Independent watchdog of stm32

In stm32

The module comes with two guard dogs: Independent guard dog (iwdg) and window guard dog (wwdg)

The independent watchdog of stm32 is driven by a dedicated 40 kHz low-speed clock. Even if the main clock fails, it still
Valid. Note that the independent watchdog clock is an internal RC clock, so it is not accurate to 40 kHz,
In the range of 30 ~ A variable clock between 60 kHz is calculated at a frequency of 40 kHz.
The time requirement of a dog is not very accurate, so the Clock Deviation is acceptable.
First, we need to explain the principle of the watchdog. This Baidu encyclopedia provides a detailed explanation. Let's summarize:
The single-chip microcomputer system will cause an endless loop due to program flying interference. The watchdog circuit is designed to avoid
This situation occurs. The function of the watchdog is to not receive the dog Feed signal within a certain period of time (implemented through the timer counter ).
(Indicates that the MCU is down), and the processor is automatically reset and restarted (sending the reset signal ). Iwdg_pr and iwdg_rlr registers provide write protection. To modify the values of these two registers, you must first
0x5555 is written in the iwdg_kr register. Writing other values into this register will disrupt the operation order and the register will be re-executed
Protected. The reload operation (write 0 xaaaa) also starts the write protection function.
There are also two registers, a pre-division register (iwdg_pr), which is used to set the frequency division of the watchdog clock.
Coefficient. Another reload register. This register is used to save the value reloaded into the counter. This register is also a 32
Bit register, but only 12 bit low is valid.
As long as the above three registers are set accordingly, we can start the independent watchdog of stm32 and start
The process can be implemented as follows (the library functions and definitions related to the independent watchdog are distributed in the file stm32f10x_iwdg.h and
In stm32f10x_iwdg.c ):
1) Disable register write protection (write 0x5555 to iwdg_kr)
In this step, we cancel the write protection of iwdg_pr and iwdg_rlr so that the two registers can be operated later,
Set iwdg_pr and iwdg_rlr values. The implementation functions in the library functions are:
Iwdg_writeaccesscmd (iwdg_writeaccess_enable );
This function is very simple. as its name implies, enable/disable write protection, that is, enable/disable write permission.
2) set the pre-division coefficient and re-load value of the independent watchdog.

The function for setting the frequency division coefficient of the watchdog is:
Void iwdg_setprescaler (uint8_t iwdg_prescaler); // sets the iwdg pre-division Value
The function for setting the reload value of the watchdog is:
Void iwdg_setreload (uint16_t RELOAD); // you can specify the iwdg reload value.
Set the frequency division coefficient prer and reload value of the watchdog to know the dog feeding time (that is, the time when the watchdog overflows ).
The time is calculated as follows:
Tout = (4 × 2 ^ prer) × rlr)/40
Where tout is the watchdog overflow time (unit: MS); prer is the watchdog clock pre-division value (iwdg_pr value ),
The value range is 0 ~ 7. rlr is the reload value of the watchdog (iwdg_rlr value );
For example, if we set the prer value to 4 and the rlr value to 625, We can get tout = 64 × 625/40 = 1000 ms,
The overflow time of the watchdog is 1 S. If you write 0 xaaaa to iwdg_kr in one second
This will cause the watchdog to reset (of course, it is also possible to write multiple times ). We need to remind you that the watchdog clock is not accurate.
It is 40 kHz, so it is better not to be too late when feeding the dog. Otherwise, the watchdog reset may occur.
3) Reload the Count value to feed the dog (write 0 xaaaa to iwdg_kr)
The function that overload the Count value in the library function is:
Iwdg_reloadcounter (); // reload the iwdg counter according to the value of the iwdg reload register
In this sentence, the value of iwdg_rlr is reloaded into the watchdog counter by the stm32. Independent access
Dog feeding operation.
4) Start the watchdog (write 0 xcccc to iwdg_kr)
The function that starts the independent watchdog in the library function is:
Iwdg_enable (); // enable iwdg
In this example, start the watchdog of stm32. Note that once iwdg is enabled, it cannot be disabled again! To disable
Closed, only restart is allowed, and iwdg cannot be enabled after restart, otherwise the problem persists, so here we remind you, if not
If iwdg is used, do not open it to avoid trouble.
Through the above four steps, we can start the stm32 dog, enabling the dog, in the program
The dog must be fed at intervals, otherwise the program will be reset. Using this, we will refer to this chapter with an LED light
Check whether the program is restarted to verify the independent watchdog of stm32.
After the watchdog is configured, ds0 will always be on. If the wk_up button is pressed, the dog will be fed as long as wk_up is continuously pressed,
The watchdog never generates a reset, keeping ds0 always on. Once the overflow time (tout) of the watchdog is exceeded,
This will cause the program to restart, which will cause ds0 to go off once.

The code in WDG. C is as follows:

# Include "WDG. H"
// Initialize the independent watchdog
// Prer: minute frequency: 0 ~ 7 (only 3 Lower !)
// Frequency division factor = 4*2 ^ prer. But the maximum value is only 256!
// Rlr: Reload register value: 11 low bit valid.
// Time calculation (approximate): tout = (4*2 ^ prer) * rlr)/40 (MS ).
Void iwdg_init (u8 prer, 2010rlr)
{
Iwdg_writeaccesscmd (iwdg_writeaccess_enable); // enables write operations on register I
Iwdg_setprescaler (prer); // ② set iwdg pre-division value: Set iwdg pre-division Value
Iwdg_setreload (rlr); // ② sets the iwdg reload Value
Iwdg_reloadcounter (); // ③ reload the iwdg counter according to the value of the iwdg reload register
Iwdg_enable (); // ④ enable iwdg
}
// Feed the independent watchdog
Void iwdg_feed (void)
{
Iwdg_reloadcounter (); // reload
}

This code has two functions. Void iwdg_init (u8 prer, 2010rlr) is an independent watchdog initialization function, that is, according
Steps 1 ~ 4. This function has two parameters, respectively used to set the pre-frequency and
Reinstalls the value of the Register. With these two parameters, we can know the reset time period of the watchdog. Calculation
The calculation method is described in detail.
Void iwdg_feed (void) function, which is used to feed the dog, because the stm32 dog feed only needs to write to the key value register
Enter 0 xaaaa, that is, call the iwdg_reloadcounter () function. Therefore, this function is simple.
The source code of the header file WDG. H is as follows. We will not list it here.
Next, let's look at the main function code. In the main program, first initialize the system code and then start
Press the key input and the watchdog. After the watchdog is enabled, Mashan lights up led0 (ds0) and enters the input of the endless loop waiting for the button,
Once wk_up has a button, feed the dog; otherwise, wait for iwdg to reset. This code is easy to understand.
The Code is as follows:
Int main (void)
{
Delay_init ();
// Initialize the latency Function
Nvic_configuration (); // sets the 2nd preemption priority and 2nd response priority of the Objective C interrupt group.
Uart_init (9600 );
// The serial port initialization baud rate is 9600
Led_init ();
// Initialize the hardware interface connected to the LED
Key_init (); // key initialization
185
Delay_ms (500); // invisible
Iwdg_init (4,625); // The sum frequency is 64, the heavy load value is 625, And the overflow time is 1 s.
Led0 = 0;
// Light led0
While (1)
{
If (key_scan (0) = key_up)
{
Iwdg_feed (); // If wk_up is pressed, feed the dog
}
Delay_ms (10 );
};
}