Initialization of the application execution environment in the startup code of S3C2440 I. Basic knowledge of the source file we wrote (. C or. s) the ELF format target file (suffixed. o), the target file is connected to the arm connector to generate an elf image file (Suffix. axf). At this time, the image file also contains some debugging information. We also need to use the fromelf tool to convert it into binary code suitable for running in ROM or RAM (Suffix. BIN), then the generated binary image file can be burned into the ROM or flash of the target board. When the target board is powered, it can be run in ROM or RAM in various ways. The image file of an executable program consists of one or more domains. The domain is divided into two types: the address where the image file is stored in the memory, called the loading domain; the other is the runtime address of the image file, which is called the runtime domain. Each field consists of one or three output segments, and each output segment consists of one or more input segments. The input segment contains the program code, initialized data, uninitialized storage area, and a storage area initialized to 0. The input segment can be divided into three attributes: RO (read-only, including code and constants), RW (readable and writable, including initialized global and static variables), Zi (uninitialized variables, which must be initialized to 0 ), the connector groups input segments according to their attributes to form different output segments. An output segment consists of input segments with the same attributes. The attributes of an output segment are the same as those of an input segment. Therefore, an output segment can be divided into three types. Fields are composed of output segments of different attributes. The output segments are arranged at the top of the RO output segment and then RW output segments. RW output segments and Ro output segments can be discontinuous, the last step is the Zi output segment, and the Zi output segment is followed by the RW output segment (the loaded domain only contains the RO and RW output segments, as described later ). An executable image is usually stored in the system ROM or flash at the beginning. The RO segment is read-only and cannot be changed during running, therefore, the RO segment can reside in ROM or flash during running, or be copied to ram with faster running speed. when running the RW segment, we need to read and write it, before running the program, this segment must be copied to ram. The Zi segment is an uninitialized global variable segment. You only need to create an Zi before running the program and clear all the regions where it is located, therefore, the image loading domain does not need to contain the Zi output segment, but the running domain must contain the Zi, And the Zi must be in Ram. Through the above instructions, we know that if an image has only the RO segment, the program does not have to copy it to ram. However, if the program contains the RW segment, the RW segment must be copied to ram, if necessary, create the Zi segment in Ram and clear it. To ensure the proper execution of the program, the necessary data copying and resetting means the initialization of the application execution environment. Ii. Basic principles of S3C2440 boot NAND Flash boot when the S3C2440 Development Board uses nand flash Boot, images are stored in NAND flash at the beginning, NAND flash can only be used as a storage program and data, and cannot run the program in it. Therefore, the initialization step of the application environment in the startup code of the S3C2440 Development Board is slightly different from the above steps. The address ing relationship between the S3C2440 image file loading and running is shown in: Before the S3C2440 is powered on, the image file is stored in the NAND Flash, and the NAND Flash has a dedicated controller control, which does not occupy the memory bank. When the Development Board is powered on, the first 4 K of NAND Flash is copied to a 4 k sram (called steppingstone) inside the S3C2440 chip "), the SRAM is mapped to address 0x00000000, and the program starts to run. Because the program cannot be run in NAND Flash, the 4 K code must contain a piece of code to copy the program in NAND flash to the SDRAM of S3C2440 (starting from 0x30000000 ). The application environment initialization should contain this code. The image file in NAND Flash is copied to the SDRAM starting from 0x30000000. At this time, the image file is not actually executed, and the file is loaded, as shown in, including the output segments of all ro attributes and the output segments of RW attributes. The output segments of the Zi attributes do not exist at this time. When the image file is running, three runtime domains are generated, as shown in figure. The starting address of the runtime domains for Ro and RW attributes is the same as that for loading, therefore, you do not need to copy the application execution environment initialization. The Zi runtime domain needs to be created and initialized to 0 before the image starts to be executed, therefore, this type of code must be included in the initialization of the application execution environment.
(Note: The starting address of the running domain of the RO and RW attributes is the same as that of the loading domain, that is, it does not need to be moved after being copied to the SDRAM. The RO base and RW base set in ads determine the link address of the program)Nor flash start when the S3C2440 adopts nor flash, the code can be directly run on it. However, to improve the running efficiency, we still need to copy the program to sdrram for running. The link between the loading address and the running address is similar to that of NAND Flash. When the NAND Flash is started, the RO and RW segments are copied to the SDRAM at the same time, and then the Zi segments are created. When starting from nor flash, the RO segment is copied first, then the RW segment is copied, And the Zi segment is created. Iii. startup code analysis
An arm program consists of three segments: r0, RW, and Zi. R0 is the code segment, RW is the initialized global variable, and Zi is the uninitialized global variable. the startup code copies the RO and RW segments to Ram and clears the Zi segments. The compiler uses the following variables to record the start and end addresses of each segment. The value of these labels is determined by the compiler settings, such as the ro-base and; RW-base settings in ads. Import | image $ Ro $ base |; base of Rom codeimport | image $ Ro $ limit |; end of ROM code (= start of Rom data) import | image $ RW $ base |; base of Ram to initialiseimport | image $ Zi $ base |; base and limit of areaimport | image $ Zi $ limit |; to zero initialise; ========================================================== =========================== ldrr0, = bwsconldrr0, [R0] andsr0, R0, #6; Judge om [1:0]! = 0, it is known that it is nor flash bootbnecopy_proc_beg; Do not read NAND flashadrr0, resetentry; OM [1:0] = 0, start cmpr0 from NAND Flash, #0; compare whether the entrance is 0. If not, use the simulator bnecopy_proc_beg. Do not start it with NAND flash when using the simulator; NOP; ========================================================== ============================ nand_boot_beg; this piece of code completes read code from NAND to ram [{true} BL rdnf2sdram] ldrpc, = copy_proc_beg; at this time, the PC is already after 0x30000000 and is the address when copy_proc_beg is connected; the code below this label completes the function of copying the content of nor flash to ram .; ========================================================== ============================ Copy_proc_begadrr0, resetentry; load address, resetentry value-> r0ldrr2, baseofrom; baseofrom value cmpr0, R2; compare Ro, r2ldreqr0, topofrom; if the values are equal (it indicates running in memory ), topofrom-> R0 when started from NAND Flash R0 = R2, when started from nor flash is not equal beqinitram; at the same time, jump to initram; the following is the copy method for the code in nor flash. The function is to copy the data from the resetentry and topofrom-baseofrom to baseofrom; topofrom and baseofrom are | image $ Ro $ limit | and | image $ Ro $ base |; | Image $ Ro $ limit | and | image $ Ro $ base | start and end address of the code segment generated by the connector during runtime; baseofbss and baseofzero are | image $ RW $ base | and | image $ Zi $ base |; | image $ RW $ base | and | image $ Zi $ base | also generated by the connector, the two are stored in LDR R3 and topofrom0ldmiar0 for initialization data !, {R4-r7} stmiar2 !, {R4-r7} cmpr2, r3bcc % b0subr2, R2, R3; the two sentences of code are corrected word non-alignment, because it is copied in 4 bytes, however, the RO segment size is not necessarily 4 bytes aligned with subr0, R0, r2initramldrr2, baseofbssldrr3, r3ldrccr1, [R0], #4strccr1, [R2], # 4bcc % B0; this section copies the data defined in resetentry to the RW segment. Movr0, #0ldrr3, endofbss1cmpr2, r3strccr0, [R2], # 4bcc % B1; initialize the Zi segment ldrpc, = % F2; goto compiler address2; [clkdiv_val> 1; means fclk: hclk is not 1:1 .; blmmu_setasyncbusmode; |; BL mmu_setfastbusmode; default value.;] [: lnot: thumbcode blmain; do not use main () Because main () is the default entry to ads, the compiler will add other code B .; if the jump to main fails, it will be suspended] [thumbcode; for start-up code for thumb mode orrlr, PC, #1 bxlr code16 blmain; do not use main () because ...... b. code32] baseofromdcd | image $ Ro $ base | topofromdcd | image $ Ro $ limit | baseofbssdcd | image $ RW $ base | baseofzerodcd | image $ Zi $ base | endofbssdcd | image $ Zi $ limit |
