Jmpi is a inter-segment jump command used in x86 real-world mode,
For example, bootseg = 0x0c70
Jmpi 4, # bootseg
If the current segment cs = 00 h, the command will jump to the segment cs = 0x0c70 after executing this command, of course, the segment Cs value will also change to 0x0c70,Next, execute the command at 0x0c70: 0004.
In real-world mode, addressing is designed to be compatible with 8086 processors, 8086 is a 16-bit CPU (The ALU data width), and 20-bit address bus can address 1 M memory space. Addressing method:Segment Base Address + offset The segment base address is stored in the CS, DS, es, and other segment registers, which is equivalent to a high 16-bit addressing, while the offset is provided by the Internal 16-bit bus. When it is sent to the external address bus, segment Base Address and offset merge 20-bit address to address 1 m physical address space.
Merging Method: shifts the base address of the segment four places to the left, and then adds the offset address. However, it is not a general addition. Because the base address of the first part of the addition has shifted 4 bits to 20 bits (the minimum 4 bits is 0), and the offset is still 16 bits, in fact, it is the addition of the base address and the high 12 bits of the Offset, and the low 4 bits of the Offset remain unchanged.
For example, after the base address of a Segment Shifts 4 digits left: 0x8880: 0
Offset address (0x0440): + 0x044 0
________________
20-bit external BUS address: 0x88c4 0
It can be seen that this so-called segment memory management is not a pure base address plus offset method, it is said that this was intel cheated at that time. The following is an article I have seen:ArticleStatement in:
8086/8088 addressing problems
====================
Both 8088 and 80286 are 16-bit CPUs. Why did intel warn IBM and Gates? What happened?
To understand what happened, let's look at the internal processor and see a huge difference. First, you need to find a 8088cpu, grind the package to the CPU wafer, and put it under the microscope. You will see the internal structure of 8086/88, which is not a new design at all, instead, two parallel 8085 (8-bit) microprocessors run a little more.
Each 8085 has its own 8-bit data and 16-bit addressing capabilities. It is easy to pretend 16-bit registers with two 8-bit data registers. As a matter of fact, there is no new thing. The RCA cosmac microprocessor uses 16 8-bit registers and can be used as internal 8-bit or 16-bit registers, you can have up to 16 8-bit registers, 8 16-bit registers, or any combination of the two. Now, an ordinary IC factory in China can be easily designed.
Due to the current production process limitations, 8088 can only have 40 feet, Intel's design "Elite" left to right, determined 20 address lines (1 m addressing space ), in addition, 16 data lines need to be reused with 16 of the 20 address lines (time-sharing, that is, the address line and the data line at the same time. For more information, see the timing section of the 8088 chip manual, you can also read 8052 single-chip microcomputer books, and its address line and data line are also reused ).
The essence of the problem is that two 8088 in 8085 each have a 16-bit addressing register. How can they address 20-bit 1 m addresses? In fact, it is very easy to combine them to form a 32-bit addressing. If so, there may be no more troubles (such as A20 ), but at that time, the "elites" may think that 32-bit addressing (4G address space) is a nonsense. It is estimated that the Earth will not be able to use so much memory when it disappears? In addition, the boss was forced to implement it again, so they used two very good 8085 methods on one hardware-segment:
They divide the 8085 K address space into 16-byte segments with 64 K segments, and use a 16-bit addressing register as the address offset register (the segment length is 64 K ), another 16-bit addressing register of 8085 is a 16-byte segment address register. Note that it does not store the 16-byte segment address, it is the serial number of the 16-byte segment (0, 1 ,... 65535 ).
The advantage of doing so is that you only need to add a er and a 20-bit er between two 8085cpus, you can complete 20-bit address addressing-A 8085 Address Register (segment address-that is, the number of 16-byte segments) shifts four places to the left (* 16 = the first address of 16-byte segments ), add another 8085 address register. Haha! You can make a transfer to your boss. The production cost is low and the design speed is fast! As for the future ,....
PS: J is the inband jump command
Jmpi is the inter-segment jump command.
Source: http://blog.csdn.net/zhl1224/article/details/5735747