Introduction to cstyle UEFI: Article 18.0 working principles of NVRAM (Part 1)

Source: Internet
Author: User
There are some good words, useful things in your mind, and nothing in your notebook. However, the information size is growing and the memory will become increasingly unreliable over time. Therefore, we have to record some of the things we have read after work to avoid being quickly forgotten. Here we will record some NVRAM-related things. The definition of NVRAM does not have to be long-winded. non-volatile memory. Of course, this definition is very broad and we will explain it differently, here we only talk about the most common narrow NVRAM in UEFI (an area in spi rom ). Generally speaking, UEFI uses two areas as NVRAM: NVRAM and nvram_backup. The reason for this is that backup and security protection are simple, it should be that NVRAM can be read and written in the dxe stage. Since NVRAM can be written, it indicates that errors may occur, such as sudden power outages, software or hardware errors, etc, NVRAM, as a very important feature of UEFI, can be used to provide flexible system configuration. If there is no perfect fault tolerance mechanism, it will cause serious problems, for example, if a block fails for some reason, we need to ensure that this error will not cause the system to crash. Again, NVRAM divides two FV values in the whole SPI Rom area. This FV attribute can be read and written. In the PEI stage, readonly variable PPI is provided to only provide the READ function, in the dxe stage, we can provide getvariable and setvariable services in the RT service to search for the required variables through guid and variablename, such as the set value of setup. In x86, the NVRAM storage area is the memory space mapped to the CPU by nanqiao, in this region, you can use the mmio method to directly read and write data, similar to reading the first command from the fffffff0 position in the x86 system during reset. The size of this region can be set through the registers of nanqiao. Generally, it is set in the SEC or early Pei phase to ensure that the region can be correctly mapped. Of course, we can also use the SPI controller of nanqiao to directly use the nor flash read/write command to directly read and write this section, just like refreshing the BIOS with software in DOS. In rt or SMM mode, some services are provided to other tools for calling. These services are beyond the scope of NVRAM. First, let's talk about how NVRAM is stored in SPI nor flahs. In fact, it is roughly divided into three parts: the implementation of every BIOS vendor is not the same, but the basic things are similar. As far as I see, the implementation of AMI A4 is different from that in udk2014, in order not to violate the laws and regulations of NDA, we will only introduce the implementation methods in udk. Part 1: Here there is only one efi_firmware_volume_header header, which mainly treats the entire NVRAM as a FV. Here, the location of the FV is unchangeable when the buid is defined, in the AMI solution, the token is generally used for control. In the udk, The FDF can be used for definition. We can find the corresponding position from the actual build logo, and then use ue to open the binary file for viewing. First, we will use the figure in a udk. Here we define that NVRAM has a position 0x280000 and its length is 0xc000.
Part 2: Here is the FFS region. Different implementation methods may be different. You can use ffs2 or FFs format.

Part 3: this is the real FFS file region. The data here is stored in the format of variable store (variable_store_header), and then the variable is used to store each data in sequence, including their names, length, guid, attribute (variable_header)
The following is an actual SPI data storage format, which can be compared one by one with the above data. The landlord has also compared the implementation of the AMI A4, although their variable store and variable data structures and implementation methods are not the same, the implementation logic is the same, the difference is that a small number of algorithms are not the same, if you are interested in reading NVRAM, let's take a look at the following: to simplify NVRAM reading, we will not consider the FTW (faulttolerantwrite) Section for the moment. We will first briefly introduce how to read the required data from NVRAM. Here, we only need two data structures to index NVRAM variables. One is the variable storage warehouse variable store, and the other is the actual variable. They all have corresponding file headers for representation, you can search down the FV and FFS that have just been dropped down. You need to check whether the pack size needs to be filled with bytes. Considering the physical characteristics of Flash may have bit inversion, before reading the file, you need to verify whether the following two file headers are valid. If an error occurs, you need to use the FTW and nvram_backup mechanisms for processing, keep this for the next time. Also, the following is the udk-based implementation. Other implementations are similar to those of A4, but basically there are guids and names as the variable headers, then, store the variables following the "Header. The specific algorithm is very simple. You can refer to the implementation of the variable. c file, as long as you have a little basic understanding, you can read it, do not need to go into details.

Now, we will record it here today and continue tomorrow.
Reprinted please indicate the source [email protected] // http://blog.csdn.net/CStyle_0x007

Introduction to cstyle UEFI: Article 18.0 working principles of NVRAM (Part 1)

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