Introduction to self-built Processor

I will upload my new book "Write a processor by myself" (not published yet). Today is the beginning. I try to write an article every Thursday.

Introduction

In this book, we designed and implemented openmips, a processor compatible with the mips32 instruction set architecture. The openmips processor has two versions: Teaching edition and practical edition. The main idea of the Teaching edition is to make it as simple as possible, and the processor runs in an idealized manner. It is similar to a textbook, so it is easy to use it for teaching, academic research, and discussion. It also helps students understand the knowledge taught in the classroom. The design goal of the practical edition is to fulfill specific functions and play a practical role.

The book is divided into three parts. The first part is the theoretical article, which introduces the instruction set architecture and the knowledge about the Tilde. The second part is the basic article, which uses the Incremental Model to implement the openmips processor for teaching. First, the processor can only execute one command. Starting from this simplest situation, by adding logical operation commands, shift operation commands, empty commands, mobile operation commands, arithmetic operation commands, transfer commands, loading storage commands, coprocessor access commands, and exception-related commands in sequence, finally, the teaching version of The openmips processor is implemented. The third part is the advanced article. By adding the wishbone bus interface for the openmips tutorial edition, we have implemented the openmips processor for the practical edition, it is also used to form a small-sized FPGA chip with the SDRAM Controller, gpio module, flash controller, UART Controller, and WISHBONE bus Interconnection Matrix, and then downloaded to the FPGA chip to verify the implementation effect, finally, the embedded real-time operating system μC/OS-II is transplanted to the openmips processor of the practical version.

The directory is as follows:

Part 1: Theory Chapter 2 processor and MIPS

1.1 simple computer model

1.2 architecture and Instruction Set

Evolution of 1.3 MIPS instruction set architecture

1.4 introduction to the mips32 instruction set architecture

Objectives and organization of the 1.5 book

Chapter 2 programmable logical devices and OpenGL

2.1 Overview of programmable logical devices

2.2 PLD-based digital system design process

2.3 introduction to OpenGL

2.4 structure of the module in OpenGL

2.5 basic elements of OpenGL

2.6 OpenGL statement

2.7 Circuit Design Example

2.8 Simulation

2.9 summary of this Chapter

Part 2-basics Chapter 1 blueprint for the openmips processor for Teaching

3.1 system design objectives

Openmips processor interface for tutorial 3.2

3.3 file description

3.4 Implementation Method

Chapter 1 Implementation of instruction Ori

4.1 Ori instructions

4.2 Establishment of pipeline structure

4.3 verify openmips implementation

4.4 create the MIPs compiling environment

4.5 summary of the implementation of the first instruction

Chapter 4 Implementation of logic, shift operations and empty commands

5.1 assembly line data problems

5.2 openmips solutions to data-related problems

5.3 test data-related problem solving results

5.4 logic, shift operations, and empty instructions

5.5 modify openmips to implement logic, shift operations, and empty commands

5.6 test procedure 1-test the logical operation Implementation Effect

5.7 Test Procedure 2-Test the effects of shift operations and empty instructions

Conclusion 5.8

Chapter 4 Implementation of mobile operation commands

6.1 mobile operation instructions

6.2 mobile operation instructions

6.3 modify openmips to implement mobile operation commands

6.4 Test Procedure

Chapter 4 Implementation of arithmetic operation commands

7.1 simple arithmetic operation instructions

7.2 Implementation of simple arithmetic operation commands

7.3 modify openmips to implement simple arithmetic operation commands

7.4 Test the implementation of simple arithmetic operation commands

7.5 Design and Implementation of pipeline suspension mechanism

7.6 instructions on Multiplication, accumulation, and Subtraction

7.7 how to implement the multiplication, accumulation, and subtraction commands

7.8 modify openmips to implement multiplication, accumulation, and subtraction commands

7.9 Test the effect of the multiplication, accumulation, and subtraction commands

7.10 division instructions

7.11 division instructions

7.12 modify openmips to implement division commands

7.13 test the implementation of Division commands

7.14 data flow chart Modification

Chapter 3 Implementation of Transfer Instruction

8.1 delay slot

8.2 transfer instructions

8.3 Transfer Instruction Implementation ideas

8.4 modify openmips to implement transfer commands

8.5 test the implementation of transfer instructions

Chapter 4 Implementation of loading storage commands

9.1 instructions on loading storage commands

9.2 how to load storage commands

9.3 modify openmips to load storage commands

9.4 modify the minimum version of the System File System

9.5 Test Procedure

9.6 instructions on link loading command ll and conditional storage command SC

9.7 LL, SC command Implementation ideas

9.8 modify openmips to implement ll and SC commands

9.9 test the effects of LL and SC commands

9.10 Load Problems

9.11 modify openmips to solve Load Problems

9.12 test the load-related problem solving Effect

Conclusion 9.13

Chapter 4 Implementation of coprocessor access commands

10.1 Introduction to coprocessor

Registers in 10.2 coprocessor cp0

Implementation of 10.3 coprocessor cp0

10.4 instructions on coprocessor access

10.5 coprocessor access command Implementation ideas

10.6 modify openmips to implement coprocessor access commands

10.7 Test Procedure

Chapter 4 Implementation of exception-related commands

11.1 error types defined in the mips32 Architecture

11.2 precise exceptions

11.3 exception handling process

11.4 exception instructions

11.4.1 self-trapping command

11.4.2 syscall

11.4.3 error response command eret

11.5 Exception Handling Implementation ideas

11.6 modify openmips for Exception Handling

11.7 try again to modify the minimum value of the system-based system

11.8 Test Procedure

11.9 teaching version openmips processor implementation Summary

Part 3: Design and Implementation of the openmips processor in Chapter 12th

Design objectives of openmips 12.1 practical edition Processor

12.2 introduction to Wishbone Bus

12.3 openmips processor Interface

Implementation of openmips 12.4 practice edition Processor

12.5 from teaching version openmips to practical version openmips

12.6 Implementation of openmips processor in practice

Chapter 2 small-sized Systems Based on openmips

13.1 structure of small-sized Systems

13.2 WISHBONE bus Interconnection Matrix wb_conmax

13.3 gpio

13.4 UART Controller

13.5 Flash Controller

13.6 SDRAM Controller

13.7 implement a small-sized System File System Based on openmips

13.8 summary of this Chapter

Chapter 2 test the openmips Processor

14.1 de2 platform Introduction

14.2 test the required hardware connection

14.3 Establishment of quartuⅱ Project

14.4 Test Procedure

14.5 Test 1-gpio Experiment

14.6 Test 2 -- UART Experiment

14.7 Test 3-simulate the loading process of the Operating System

14.8 summary of this Chapter

Chapter 1 transplantation of μC/OS-II for openmips Processor

15.1 why Operating System

15.2 introduction to embedded real-time operating system

15.3 μC/OS-II Overview

15.4 μC/OS-II features

Several Concepts of 15.5 μC/OS-II

Basic functions of 15.6 μC/OS-II

15.7 μC/OS-II File System

Transplantation condition of 15.8 μ c/OS-II

15.9 use assembly code in C Language

15.10 MIPS function call Specification

Porting 15.11 μC/OS-II on openmips Processor

15.12 Test Procedure

15.13 compile the instruction file

15.14 μC/OS-II after the openmips processor runs the transplanted

15.15 summary of this Chapter

Appendix A description of interfaces of openmips modules

A.1 PC Module Interface Description

A.2 if/ID Module Interface Description

A.3 ID Module Interface Description

A.4 regfile Module Interface Description

A.5 ID/ex Module Interface Description

A.6 ex Module Interface Description

A.7 Div Module Interface Description

A.8 EX/MEM Module Interface Description

A.9 mem Module Interface Description

A.10 MEM/WB Module Interface Description

A.11 cp0 Module Interface Description

A.12 llbit Module Interface Description

A.13 Interface Description of the Hilo Module

A.14 CTRL Module Interface Description

Appendix B all commands implemented by openmips and the corresponding machine code

B .1 logical operation commands

B .2 shift Operation Command

B .3 mobile operation commands

B .4 arithmetic operation commands

B .5 Transfer Instruction

B .6 load storage commands

B .7 coprocessor access command

B .8 exception-related commands

B .9 empty commands and other commands

 

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