Introduction to the interrupt register and interrupt process of S3C2440

Source: Internet
Author: User
There are a total of 60 interrupt sources in the S3C2440 interrupt registers and the interrupt process S3C2440, 15 of which correspond to each phase in the subsrcpnd register, the other 45 interrupt sources correspond to each phase in srcpnd. Note that eint4 ~ 7 corresponds to the same srcpnd [4], while eint8 ~ 23 corresponds to srcpnd [5.

1 S3C2440 interrupt register

There are two main types of interruptions: External interruptions and internal interruptions.

1.1 External Interrupt Registers 24 External Interrupt occupancy GPF0-GPF7 (EINT0-EINT7), GPG0-GPG15 (EINT8-EINT23 ). If you use these pins for interrupt input, you must configure the pins to interrupt and do not pull them up. For details, refer to the datesheet Data Manual.
Register:
EXTINT0-EXTINT2: Set EINT0-EINT7, EINT8-EINT15, EINT16-EINT23 trigger mode (High Level Trigger, low level trigger, descent trigger, rising edge trigger ).
EINTFLT0-EINTFLT3: controls the filter clock and filter width.
Eintpend: This is the interrupt pending register. When clearing, write 1, followed by write 1. When an External Interrupt (EINT4-EINT23) occurs, the corresponding bit is set to 1. Why are there no EINT0-EINT3 because they are controlled by the last 4 bits of the srcpnd register, respectively.
Eintmask: This is simple. It is used to block the interruption. That is to say, when the bit is 1, the interruption is invalid.

1.2 The internal interrupt register contains eight internal interrupt registers. Register:
Subsrcpnd: When an interruption occurs, the corresponding bit is set to 1, indicating that an interruption has occurred.
Intsubmsk: it is the same as the previous interrupt shielding register.
Srcpnd: When an interruption occurs, the corresponding bit is set to 1, indicating that one or more interruptions occur.
Intmsk: used to block the interruption identified by the srcpnd register. However, only IRQ interruptions can be blocked, and FIQ interruptions cannot be blocked.
Intmod: When an intmod is set to 1, its interrupt is set to FIQ, And the CPU enters the fast interrupt mode.
Priority: used to set the priority of IRQ interruptions. For more information, see the chip manual.
Intpnd: After the highest-priority interrupt is selected by the interrupt priority arbitration, the corresponding bit of the interrupt in the intpnd register is set to 1, and then the CPU enters the interrupt mode to process it. At the same time, only one register is set to 1.
Effecffset: Used to indicate which one is set in the intpnd register, that is, to record the value of X where the intpnd's median [x] is 1. It is automatically cleared when intpnd and srcpnd are cleared.

1.3 relationship between various registers:

Figure 1 Relationship between various interrupt registers 2 interrupt process 2.1 internal interrupt Process

If a is an internal interruption that does not interrupt the tape: after the occurrence, the srcpnd position is 1. If it is not blocked by intmsk, wait for further processing.
B. If it is the internal interruption of the belt: after the occurrence, the corresponding position of subsrcpnd is 1. If it is not blocked by intsubmsk, the corresponding position of srcpnd is 1. Wait for further processing. Several subsrcpnd may correspond to the same srcpnd, the corresponding table is as follows:


2.2 External Interruption Process

A if it is external interrupt: srcpnd corresponding position 1 after the EINT0-EINT3 occurs, if not blocked by intmsk, then wait for further processing. EINT4-EINT23 occurs after eintpend corresponding position 1, if not blocked by eintmask, then srcpnd corresponding bit EINT4-7 or EINT8-23 set 1, if not blocked by intmsk, wait for further processing, several eintpends correspond to the same srcpnd. The corresponding table is as follows:



All three types of interruptions are pending for further processing. Next, let's look at the srcpnd. If the interrupt is blocked, it is unnecessary (note: the interrupt can also be blocked ). If it is not blocked, it will be further added to intmod. For fast interruption, go out and enter FIQ (that is, the CPU enters the fast interruption mode for processing ). If it is a normal interrupt, srcpnd can usually be set to 1 (only one FIQ can be set). In this case, a priority is selected through priority, next, place intpnd in the corresponding position 1 Based on the selected interrupt (Note: Only one can be selected) and enter IRQ for CPU processing.

2.3 interrupt Enabled

A. If it is an internal interruption without interruption, you only need to set intmsk so that it does not block the interruption.
If it is an internal interruption of the tape interruption, you need to set intsubmsk and intmsk so that they do not block the interruption.
C In case of external interruption, for the EINT8-23 needs to be set eintmask and intmsk. For the EINT0-EINT3, you only need to set intmsk.

2.4 clearing of interruptions

A. If it is an internal interruption without tape interruption, you only need to clear srcpnd. Note that location 1 is required to be cleared.
B. If it is an internal interruption of the tape, you need to clear srcpnd and subsrcpnd. Be sure to clear subsrcpnd first and then srcpnd. Because, if you first clear srcpnd, and then in the process of clearing subsrcpnd, srcpnd will think that there is another interruption, and then set it to 1. That is to say, a single interruption will respond twice. Therefore, the source must be cut off first.
C In the case of external interruptions, the eintpend and srcpnd need to be cleared for the EINT8-23 (same attention to order ). For EINT0-EINT3, just clear srcpnd.

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