A basic knowledge
BYTE 8 bit
Half Word 16 bits
Word 32 bit
Two doubts
Code, Ro-data,rw-data,zi-data
Code as part of the program codes
Ro-data represents a program-defined constant const temp;
Rw-data represents a global variable that has been initialized
Zi-data represents an uninitialized global variable
Program size:code= "18248" ro-data=320 rw-data=260 zi-data=3952
Code, Ro-data,rw-data, ..... flash
Rw-data, Zidata ............ Ram
Three detailed analysis
Rw-data copy from Flash to ram when initializing
The generated map file is located under the List folder (KEIL)
Total RO Size (Code + ro Data) 18568 (18.13kB)
Total RW Size (rw data + ZI data) 4212 (4.11kB)
Total ROM Size (Code + RO data + RW data) 18828 (18.39kB)
The arm instruction is exactly 1 characters long (allocated as 4 bytes), and the thumb instruction is exactly half a word (2 bytes)
R0-r15 (R15-PC,R14-LR,R13-SP) 32-bit
Each exception pattern also comes with a program state Save Register (SPSR), which is used to save CPSR before an exception event occurs
Ldmia r1!,{r2-r7, R12}; Read the data from the R1 single woodlands to R2-r7,r12, R1 automatically add 1
Stmia Ro!,{r3-r6,r10}; Save the data in R3-r6,r10 to the address that Ro points to, RO automatically add 1
The offset is added to the RN before the data is transferred, and the result is used as the storage address for the transmitted data. If you use the suffix "!", the result is written back to RN, and the RN value is not allowed to be R15. The instructions are as follows:
LDR Rd, [Rn, #Ox4]!
LDMFD sp!,{r0-r3,pc}^; interrupt return
The "^" symbol indicates that this is a special form of instruction. This instruction is also restored when the PC is loaded from memory (the PC is last restored), and the CPSR
Big-endian format (Big-endian)
Small end Format (Little-endian)
Data 0x12345678 storage format
Big-endian format
Low address <----0x12|0x34|0x56|0x78----> High Address
Small End format
Low address <----0x78|0x56|0x34|0x12----> High Address
The ARM microprocessor supports 7 modes of operation, namely: CPSR m[4:0]
1. User mode (USR): ARM processor normal program execution status. 10000
2. Fast Interrupt Mode (FIQ): For high-speed data transmission or channel processing. 10001
3. External interrupt mode (IRQ): Used for general interrupt handling. 10010
4. Management Mode (SVC): The protection mode used by the operating system. 10011
5. Data access termination mode (ABT): Enter this mode when data or instruction prefetching is terminated, and can be used for virtual storage and storage protection. 10111
6. System mode (SYS): Runs a privileged operating system task. 11111
7. Define instruction Abort Mode (und): Enter this mode when undefined instruction is executed, which can be used to support software emulation of hardware coprocessor. 11011
ARM works normally in user mode and system mode, when reset enters management mode.
For ARM instruction sets, the PC points to the address of the next two instructions of the current instruction,
Note that the PC, when debugging shows the current instruction address, while using MOV lr,pc when LR saved is this instruction back to the number of two instructions address
Assumed disassembly code: 0x000001:mov LR PC
(The value of viewing the PC register at this time is 0x000001, but the actual PC value is 0x000003, which is 0x000003 in LR)
Fields specify the transferred area (PSR Cpsr or SPSR)
C Control domain Masking bytes (psr[7..0])
x Extended domain Masking bytes (psr[15..8])
s state domain shielded bytes (psr[23..16])
F Flag Field screen byte (psr[31..24])
For example: MSR cpsr_c, #0xD3; cpsr[7...0] = 0xd3
Keil MDK in the code, Ro-data, Rw-data, zi-data What is the meaning of each? Go