Knowledge of the 32-bit timer in the cortex-M0 chip lpc11c14xx

Instructor Yang,Hua Qing vision embedded college lecturer.

There are two 32-bit timers in the lpc11cxx chip, which can be used for timing or counting. With a one-way 32-bit capture channel, the current value of the timer can be captured or interrupted when the input signal changes. It has four external matching registers and four external output registers. In addition, each register can allow up to three matching outputs to be used as a single side along the PWM output.

1. registers to be configured during timer initialization.

Ioconfig: configure the corresponding PIN registers to set the pins related to the timer.

Sysahbclkctrl: this register is used to enable the clock of the selected timer.

Tmr32b0ctl: Controls timer and counter enabling and Reset Control. This register is generally placed at the end to set.

Tmr32b0mr0: used to set the matching value of the matching register 0.

Tmr32b0cr: Used to set conditions for external capture and determine whether to interrupt the capture.

Tmr32b0cr0: used to load the TC register value when an external capture occurs.

Tmr32b0emr: used to obtain the level of the matching register and the corresponding PIN (PIN Association, set in ioconfig ), it is used to control the action (level-up, pulling-down, and inversion) of the corresponding PIN when the value of the matching Register matches with the TC ). No matter whether the corresponding PIN is associated with a value in the 0-3 bits in the register, when a match occurs, a value in the 0-3 bits will be changed according to the settings (pull height, pull low, reverse ). If the PIN is associated with the bit, the level of the corresponding PIN also changes.

Tmr32b0ctcr: used to enable the operation mode (Timer/Counter). If the counter mode is selected, the first three digits of the tmr32b0cr register must be 0.

Tmr32b0pwmc: used to set the PWM mode. Generally, mat [0: 2] is used to set the PWM output mode, and mat [3] is used to set the PWM cycle, because Mat [3] has no pin output.

The output of PWM Controlled by a single edge is low at the beginning of each cycle (the timer value is 0) unless the matching value is 0. When the MR value of any matching Register matches Tc (the timer value), the output flat of the PWM is pulled to a high level. You can set the MR3 value to the PWM period, and set the timer to reset when matching the MR3 value. After the timer is reset, the TC value is cleared. After the timer is reset, the high levels of all PWM outputs are cleared.

If it is set to PWM output, the settings in the external matching register EMR no longer work.

Ii. Example of timer Initialization

1. Initialization as a Timer:

Lpc_syscon-> sysahbclkctrl | = (1 <9); used to enable the timer clock.

/* Set the corresponding PIN */
Ap-southeast-1 ~ 0x07;/* timer0_32 I/O config */
Lpc_iocon-> pioft-5 | = 0x02;/* timer0_32 cap0 */
Ap-southeast-1 ~ 0x07;
Maid | = 0x02;/* timer0_32 mat0 */
Ap-southeast-1 ~ 0x07;
Lpc_iocon-> pio3167 | = 0x02;/* timer0_32 mat1 */
Lpc_iocon-> pio0_1 & = ~ 0x07;
Lpc_iocon-> pio0_1 | = 0x02;/* timer0_32 mat2 */

/* Set the value of external matching register 0 */
Lpc_tmr32b0-> mr0 = timerinterval;

/* Set the action to be performed when a match occurs */
Lpc_tmr32b0-> EMR & = ~ (0xff <4 );
Lpc_tmr32b0-> EMR | = (0x3 <4) | (0x3 <6) | (0x3 <8) | (0x3 <10 ));

/* Used to set external capture conditions */
Lpc_tmr32b0-> CCR = (0x1 <0) | (0x1 <2 );

/* Set the third value of the external matching register */
Lpc_tmr32b0-> MCR = 3;

/* Enable timer interruption */
Nvic_enableirq (timer_32_0_irqn );

2. Initialization for PWM output:

Lpc_syscon-> sysahbclkctrl | = (1 <10 );

/* Set the pins of the external matching register 0. */
Lpc_iocon-> r_pio1_1 & = ~ 0x07;
Lpc_iocon-> r_pio1_1 | = 0x03;/* timer1_32 mat0 */

/* Set the third pin of the external matching register. */
Lpc_iocon-> pio1_4 & = ~ 0x07;
Lpc_iocon-> pio1_4 | = 0x02;/* timer1_32 mat3 */

/* Set to PWM output mode */
Lpc_tmr32b1-> pwmc = (1 <3) | (1 <0 );

/* Set the matching value */
Lpc_tmr32b1-> MR3 = period;
Lpc_tmr32b1-> mr0 = period/2;
Lpc_tmr32b1-> MCR = 1 <10;/* a timer reset is required when MR3 is matched */

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Knowledge of the 32-bit timer in the cortex-M0 chip lpc11c14xx