First: Makefile Document Preparation |
1. The first letter is capitalized and the rest is lowercase. |
2.Makefile is related to the compilation of the whole project. |
3. Can execute the operating system command. |
4. In fact, the essence of makefile is to define the problem of dependency between documents. |
5. The first letter is capitalized and the rest is lowercase. |
When the make command executes, a Makefile file is required to tell the make command how to compile and link the program.
Second: examples
1. When we use GCC to compile multiple source files, we use multiple commands to execute, but we use the make command to differ
Here you are.
2. Preparation of Makefile Documents
MAIN:ONE.O two.o THREE.O
Three.o:three.c
Gcc-c three.c
Clean
RM one.o TWO.O THREE.O//Remove intermediate files using make clean
Third: summary
Summarize the Makefile rules:
[C-sharp] View plaincopy
Target ...: Prerequisites ...
Command
...
...
Target is either an object file, or it can be an executable file. can also be
A label (label).
Prerequisites is the file or target that is needed to generate the target.
command is what you need to execute. (Arbitrary shell commands)
This is a file dependency, that is, target this or multiple destination files depend on the
A file in prerequisites whose build rule is defined in the command. To say the least,
If more than one file in prerequisites is newer than target file, command will
The righteous commands will be executed. This is the makefile rule. Which is the core content of makefile.
Part Four: summary of make command working process
1, make will be in the current directory to find the name "Makefile" file.
2, if found, it will find the file in the first target file (target), and the file as the most
End of the target file. Like the above example for file
3, if the file file does not exist, or files rely on the subsequent. o File modification time than
File is new, then he executes the command defined later to generate file.
4. If file does not depend on the. o files, make will find the target. o file in the current file
Dependencies and, if found, generates an. o file based on that rule.
5, of course, your C files and h files are there, so make will generate the. o file, and then use. O
File life make is the ultimate task, that is, the execution file files.
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