LPC1768 Clock Configuration

1) Internal RC oscillator

The internal oscillator can be regarded as the clock source of the watchdog timer or as a clock source for the PLL0 and CPU, but it cannot be used as the USB clock source because the accuracy is not reached. And if the can baud rate is higher than 100kb/s, it is also not used. When the system is power up, the LPC1768 uses an internal oscillator until the software switches it to another available clock source.

2) Main oscillator

The main oscillator can be used as the clock source of the CPU, and it needs to be configured by frequency division and octave. Basically use the main oscillator as the clock source

3) RTC Oscillator

The RTC Oscillator provides an 1hz-32khz RTC clock output that can be used as a clock source for PLL0, CPU, and watchdog timing.

The LPC1768 clock configuration involves several processes:

1) Clock Source selection

The choice of the clock source involves the configuration of the SCS register

2) Clock Divider

Configuration related to Cclkcfg registers

3) PLL0 Configuration

Related to Clksrcsel, pll0cfg, pll0feed and other registers configuration

4) PLL1 Configuration

Involves configuration of registers such as PLL1CFG, pll1feed, etc.

5) Peripheral Clock output

The specific code is as follows:

#define CLOCK_SETUP 1#define scs_val 0x00000020#define clksrcsel_val 0x00000001#define Pll0_setu P 1#define pll0cfg_val 0x00050063#define pll1_setup 1#define pll1cfg_val 0x00000023#defi Ne cclkcfg_val 0x00000003#define usbclkcfg_val 0x00000000#define pclksel0_val 0x00000000#define PCLKS         El1_val 0x00000000#define pconp_val 0x042887de#define clkoutcfg_val 0x00000000#define FLASH_SETUP 1#define flashcfg_val 0x0000303a//clock configuration void Systeminit () {#if (Clock_setup)//clock source settings Lpc_sc->scs = scs_val;if (S Cs_val & (1 << 5)) {while ((Lpc_sc->scs & (1 << 6)) = = 0);//The main oscillator has stabilized}//PLL frequency out of the clock sent to the CPU before the crossover, Cclkcfg_   Val = 3, for 4 lpc_sc->cclkcfg = Cclkcfg_val; Setup Clock divider#if (pll0_setup) Lpc_sc->clksrcsel = Clksrcsel_val; Lpc_sc->pll0cfg =pll0cfg_val; Lpc_sc->pll0feed = 0xAA; Lpc_sc->pll0feed = 0x55; Lpc_sc->pll0con = 0x01; Lpc_sc->pll0feed = 0xAA; LpC_sc->pll0feed = 0x55;while (!) (  Lpc_sc->pll0stat & (1<<26));             Wait for PLOCK0 Lpc_sc->pll0con = 0x03; /* PLL0 Enable & Connect */lpc_sc->pll0feed = 0xAA; Lpc_sc->pll0feed = 0x55;while (!) ( Lpc_sc->pll0stat & (1&LT;&LT;25) | (1<<24))); #endif # if (pll1_setup) lpc_sc->pll1cfg = Pll1cfg_val; Lpc_sc->pll1feed = 0xAA; Lpc_sc->pll1feed = 0x55;             Lpc_sc->pll1con = 0x01; /* PLL1 Enable */lpc_sc->pll1feed = 0xAA; Lpc_sc->pll1feed = 0x55;while (!) (             Lpc_sc->pll1stat & (1&LT;&LT;10));/* Wait for PLOCK1 */lpc_sc->pll1con = 0x03; /* PLL1 Enable & Connect */lpc_sc->pll1feed = 0xAA; Lpc_sc->pll1feed = 0x55;while (!) ( Lpc_sc->pll1stat & ((1<< 9) | (1<< 8)));    * Wait for Pllc1_stat & Plle1_stat * * #elseLPC_SC->usbclkcfg = usbclkcfg_val; /* Setup USB Clock Divider */#endifLPC_SC->pclksel0 = Pclksel0_val; /* Peripheral Clock Selection */lpc_sc->pclksel1 = pclksel1_val;        Lpc_sc->pconp = Pconp_val;    /* Power Control for peripherals */lpc_sc->clkoutcfg = Clkoutcfg_val; /* Clock Output Configuration */#endif # if (Flash_setup = = 1) lpc_sc->flashcfg = Flashcfg_val; #endif}

This configures the clock frequency to complete and configure the 400MHz.

Fcco = 12mhz* 2 * 100/6 = 400MHz

LPC1768 Clock Configuration