lpc43xx Sgpio Configuration

lpc43xx Sgpio Configuration

The lpc43xx Sgpio peripheral is used to move samples between USB and the ADC/DAC chip (MAX5864).

The Sgpio is a peripheral, which has a bunch of 32-bit shift registers.

These shift registers can be configured to act as a parallel interface of different widths.

For HACKRF, we configure the Sgpio to transfer eight bits at a time.

The Sgpio interface can also accept an external clock, which we use to synchronize transfers with the sample clock.

The current HACKRF design, there is a CPLD which manages the interface between the MAX5864 and the Sgpio interface.

There is four sgpio signals that control the SGPIO data transfer:

• Clock:determines when a value in the Sgpio data bus is transferred.
• Direction:determines whether the MAX5864 DA (ADC) data is driven onto the sgpio lines,
  Or if the Sgpio lines drive, the data bus with data for the MAX5864 DD (DAC) signals.
• Data valid:indicates A sample on the Sgpio data bus is Valid data.
• Transfer enable:allows Sgpio to synchronize with the I/Q data stream.
  The MAX5864 produces/consumes the values (Quadrature/complex value) per sample period-an I value and a Q value.
  These, multiplexed on the sgpio lines. This signal suspends data valid until the I value should is transferred.

Frequently asked questionswhy not use GPDMA to transfer samples through Sgpio?

It would is great if we could, as that would free up lots of processor time.

Unfortunately, the GPDMA scheme in the lpc43xx does not seem to support

Peripheral-to-memory and memory-to-peripheral transfers with the Sgpio peripheral.

You might observe so the Sgpio peripheral can generate requests from SGPIO14 and SGPIO15,

Using a arbitrary bit pattern in the slice shift register.

The pattern in the slice determines the request interval.

That ' s a good start.

However, how does you specify which Sgpio shadow registers is read/written at each request,

And in which order those registers is transferred with memory?

It turns out of you can ' t.

In fact, it appears a sgpio request doesn ' t cause any transfer @ All, if your source or destination is "peripheral" .

Instead, the Sgpio request is intended to perform a memory-to-memory transfer synchronized with Sgpio.

But your ' re on your own as far as getting data to/from the Sgpio shadow registers.

I believe the Sgpio camera example in the user manual describes an sgpio interrupt doing the Sgpio shadow Regi Ster transfer,

And the GPDMA doing moves from a block of RAM to another.

Perhaps if we transfer only one Sgpio shadow register, using memory-to-memory?

Then we don ' t has to worry about the order of Sgpio registers, or which ones need to be transferred.

It turns out if you switch through to memory-to-memory transfers, you lose peripheral request generation.

So the GPDMA would transfer as fast as possible--far faster than words is produced/consumed by Sgpio.

I ' d really love to being wrong about all this, but all my testing have indicated there ' s no workable solution

To using the GPDMA that's any better than using the Sgpio interrupts to transfer samples.

If you want some sample GPDMA code to experiment with, please contact Jared (sharebrained on freenode #hackrf).

lpc43xx Sgpio Configuration