MCS51 single-chip special function register

MCS-51 microcontroller latches, timers, serial port data buffers and various control registers and status registers are in the form of special function registers (or special function registers, they are scattered in the internal RAM address space range (80 h ~ In FFH), table 2-5 lists the note identifiers, names, and addresses of these special function registers (SFR.

 

Specifically, all the special function registers whose byte addresses can be divisible by 8 can be addressing in bits. The addresses are shown in Table 2-6.

 

The Application of most registers will be reviewed in the relevant sections below. Here we will only give a brief introduction.

· Accumulators ACC

The accumulators are the most commonly used specialized registers. Most operations of Single-operand commands are taken from the accumulators. One of the operations of many dual-operand commands is taken from the accumulators. The operation results of the addition, subtraction, multiplication, and Division arithmetic operation commands are stored in the or AB register pairs of The accumulators. In the command system, A is used as the Enable of the accumulator.

· Register B

The B register is used in the multiplication/division command. The two operands of the multiplication command are obtained from A and B respectively. The result is stored in the AB register center. In the division command, the divisor is A, the divisor is B, the quotient is A, and the remainder is B. In other commands, register B can be used as a unit in Ram.

· Program status word psw

The program status word is an 8-bit register that contains the program status information. For the meanings of this Register, see Figure 2-8.

 

 

Psw.1 is not used. Other notes are as follows:

· Cy (ps00007) carry mark

Some arithmetic and logical commands can be reset or cleared by hardware or software. In a Boolean Processor, it is considered a bit accumulators; its importance is equivalent to a in a general central processor.

· AC (ps00006) Secondary carry sign

When addition or subtraction is performed to generate a four-digit low (a decimal number leads to a four-digit high carry or borrow position, the AC will be set by the hardware; otherwise, it will be cleared. AC is used for decimal adjustment. For details, see the DAA command.

· Fo (ps00005) Flag o

It is a user-defined State mark. It can be set or cleared by software, or the fo can be tested by software to control the flow of the program.

· RS1, rs0 (ps00004, ps00003) Register Selection control bit 1 and 0

You can use software to set or clear the bit to determine the working register area. The relationship between RS1 and rs0 and the register area is as follows:

RS1 rs0

0 0 -- Zone 0 (00h ~ 07 h)

0 1 -- Zone 1 (08h ~ 0fh)

1 0 -- Zone 2 (10 h ~ 17 h)

1 1 -- Zone 3 (18h ~ 1fh)

· Ov (ps00002) overflow flag

When an arithmetic command is executed, the hardware is set or cleared to indicate the overflow. When the Add command is executed, if C6 'is used to indicate that D6 bits are in the D7 bits, and c7' is used to indicate that D7 has a carry bits, then:

OV = C6 '1_c7'

That is to say, when a 6-digit 7 has a forward digit while a 7-digit 7 does not carry a cy, or a 6-digit 6 does not carry a 7-digit while a 7-digit cy has a forward digit, the overflow mark OV is set, otherwise, it is cleared.

Similarly, when executing the subtraction command subb, C6 and C7 indicate that there is a bid. Therefore, overflow signs can be obtained by an exclusive OR gate on the hardware.

Overflow signs are commonly used when the ADD and subb commands are used for addition and subtraction of the number of symbols. ov = 1 indicates that the result of the addition and subtraction operation exceeds the number of symbols (2's complement) that can be expressed by the destination register) range (-128 ~ + 127), see the instructions on the ADD and subb commands in Chapter 3.

In the MCS-51, the execution results of the unsigned number multiplication command Mul also affect the overflow flag. If the product of the two numbers in the accumulators A and register B exceeds 255, ov = 1; otherwise, ov = 0. The upper 8 bits of this product are placed in B, and the lower 8 bits are placed in. Therefore, ov = 0 means that only product is obtained from a; otherwise, product is obtained from the BA register pair.

The Division instruction Div also affects the overflow flag. If the divisor is 0, ov = 1; otherwise, ov = 0.

· P (psw.0) Parity mark

Each instruction cycle is set by hardware or cleared by 0 to indicate the parity of the number of digits 1 in the accumulators. If the number of digits in 1 is odd, P is set. Otherwise, 0 is cleared. This flag is of great significance for data transmission in serial communication. In serial communication, parity is often used to check the reliability of data transmission. On the sending end, you can set or clear the parity position of the data based on the value of P. If the odd parity check method is adopted in the communication protocol, when P = 0, the odd/even position of the data (assumed to be obtained by a) should be cleared; otherwise, the data will be cleared.

· Stack pointer sp

The stack pointer SP is an 8-bit special register. It indicates the position of the top of the stack in the internal RAM. After the system is reset, the SP is initialized to 07 h, so that the stack actually starts from the 08h unit. Considering 08h ~ Lfh units belong to the working register area 1 ~ 3. If these zones are used in the program design, it is best to change the sp value to 1fh or a larger value. The smaller the initial value of SP, the deeper the stack depth. The value of the stack pointer can be changed by the Software. Therefore, the position of the stack pointer in the internal RAM is flexible.

In addition to using software to directly change the sp value, when executing the push, pop command, various subroutine calls, interrupt response, subroutine return (RET) and interrupt return (RETI) commands, the SP value is automatically increased or reduced.

· Data Pointer dptr

The Data Pointer dptr is a 16-bit special register. Its high byte register is represented by DPH, and the low byte register is represented by DPL. It can be processed either as a 16-bit register dptr or as two independent 8-bit registers DPH and DPL. Dptr is mainly used to store 16-bit addresses. when addressing 64 kB external data storage space, it can be used as an inter-address register.

There are two shipping commands:

Movx A, @ dptr

Movx @ dptr,

When accessing the program memory, dptr can be used as the base address register. There is a command movx A, @ A + dptr, which adopts the base address change addressing mode, it is often used to read the table constants stored in the program memory.

· Port P0 ~ P3

Dedicated registers P0, P1, P2, and P3 are I/O Ports P0 ~ P3 latches. P0 ~ As a dedicated register, P3 can also be used in other operation commands in direct addressing mode.

· Serial data buffer sbuf

The serial data buffer sbuf is used to store the data to be sent or received. It is actually composed of two independent registers, one is the sending buffer and the other is the receiving buffer. When the data to be sent is transmitted to sbuf, the sending buffer is used. When reading data from sbuf, it is taken from the receiving buffer and the received data is taken away.

· Timer/Counter

MCS-51 series has two 16-bit Timer/Counter T0 and T1. Each register is composed of two independent 8-bit registers. There are four independent registers: th0, tl0, Th1, TL1. These four registers can be addressable, but T0 and T1 cannot be considered as a 16-bit register.

· Other control registers

The IP, ie, tmod, tcon, scon, and pcon registers respectively contain the control and status bits of the interrupt system, Timer/counter, serial port, and power supply mode, these registers are described in the joints in this chapter.