Check the S3C2440 Data Manual. We can see that the S3C2440 can address the 1g address range, but the S3C2440 has only 27 address lines. Theoretically, only the 27 power of 2 is equal to M.
Through careful analysis, we can see that S3C2440 solves this problem through a bank. The S3C2440 has 8 memory banks and leads to 8 bank lines (corresponding to ngcs0 ~ Ngcs7), select and disable different memory through the eight lines, so that the S3C2440 can connect up to eight MB of memory. The access to a bank address is actually the access to the bank, so the ARM core only needs to issue an address, and the storage controller of S3C2440 interprets the address as two parts: the Bank address, some of them can be accessed by connecting to the internal address of the bank memory. As a 32-bit CPU, theoretically, the address range can reach the power of 2 to the power of 4G. Apart from the above 1g address space, there is also a part of the address of the internal registers of the CPU, the remaining address space is not used.
Figure 1 memory ing of S3C2440
How is the address mapped after 0X4000 0000?
0X4000 0000 -- 0X4000 0fff
4 kb SRAM is mapped to the address range when the nor flash is started, and 4 kb is mapped to the disk when the NAND is started.
If the SRAM ing is 0x0000 0000, the address range is retained.
0X4000 0fff -- 0x4800 0000 Reserved
0x4800 0000 -- 0x6000 0000 special function Register address
0x6000 0000 -- 0 xFFFF FFFF unused
For details about how these addresses are mapped, refer to another blog 《In-depth mining of special function register addresses of S3C2440.