hierarchical structure of memory
Buffer Memory Cache
Read Cache operation The cache is read directly from the cache if it contains data because the cache speed is faster than memoryif not included, from the memory, find and put into the cache, and then read the words directly from the cache read, the next visit many times will be much faster, equivalent to improve the hit rate, the CPU access speed greatly improved cache can greatly increase the CPU access rate
the design of the cachenot too big, not too small. too big, because the program needs to go through the cache when looking at the data, if the cache is too large,then the time to go too long, you can not achieve the effect of the rate of increase If it is too small, the number of blocks stored in memory is less, the hit rate is reduced, the number of accesses to memory increases, and the CPU performance is reduced Block Sizedata exchange unit for cache and memoryFrom small to large, by the principle of locality, hit increasebecome larger, the likelihood of newly acquired data being used is less likely to be used again by data that must be removed from the cache, and the hit rate is greatly reduced
DMA Massive mobile data CPU performance is fast, peripheral speed is relatively slow, the CPU will wait for peripheralsso the DMA was born. previously without DMA, data was passed from memory through CPU to peripherals with DMA, the CPU tells the DMA, the memory from an address to start, how much data to the peripheral, so that the DMA to do, the CPU does not have to do, the DMA will take the memory out of the data, and then to the peripherals, this mechanism is the DMA mechanism, the CPU is liberated, Do more important things, so this memory copy, the data to move a large number of copies of the use of DMA to liberate the CPU, remember that the CPU only at the beginning of the end of the participation at the beginning: at the end:Interrupt Processing RoutinesWelcome to Exchange
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Memory structure, cache, DMA architecture analysis--"sky original"
