Memory Structure of 8051 Single Chip Microcomputer

MCS-51 Microcontroller in the physical structure has four storage space:

1. In-chip program memory
2. Off-chip program memory
3. In-chip data storage
4. Off-chip data storage

But logically, from the user's point of view, 8051 Single-Chip Microcomputer has three storage spaces:

1. 64 K program memory address space (movc)
2. Address Space of the On-chip data storage of 256b (mov)
3. and 64 K off-chip data storage address space (movx)
When you access three different logical spaces, you should use different forms of commands (we will explain the instructions later in the instruction system ), to generate the selected communication numbers for different storage spaces.

Program memory Rom

Addressing range: 0000 h ~ Ffffh capacity 64 KB
Ea = 1, addressing internal ROM; EA = 0, addressing external Rom
Address length: 16 characters
Purpose: store the program and the constant required for running the program.
The seven units with special meanings are:
0000 h -- system reset, where the PC points;
0003 h -- External Interrupt 0 entry
000bh -- t0 overflow interrupt entry
0013 h -- External Interrupt 1 entry
001bh -- T1 overflow interrupt entry
0023 h -- Serial Port Interrupt entry
002bh -- T2 overflow interrupt entry

Internal data storage Ram
There are two physical areas: 00 h ~ 7fh is the ram and SFR areas in B.
Function: Used as a data buffer.

Is the spatial structure of the 8051 microcontroller memory

Program memory

A microprocessor can intelligently execute a certain task. In addition to their powerful hardware, they also need the software they run. In fact, the microprocessor is not intelligent, they are only executed in full accordance with pre-compiled programs. The programs written by the designer are stored in the program memory of the microprocessor, commonly known as the read-only program memory (ROM ). The program is equivalent to a series of commands for the microprocessor to handle problems. In fact, programs and data are similar code strings composed of machine codes. Only program code is stored in program memory.
The MCS-51 has a 64kb program memory addressing space, which is used to store information such as user programs, data, and tables. For a 8031 single-chip microcomputer without a Rom, its program memory must be external and its spatial address is 64kb. At this time, the single-chip microcomputer end must be grounded. Forces the CPU to read programs from external program memory. For a single-chip microcomputer with an internal ROM of 8051, a high level is required during normal operation so that the CPU reads the program from the internal program storage. When the Pc value exceeds the internal ROM capacity, to the external program memory to read the program.
When the value is 1, the program starts to run from the in-disk ROM. When the Pc value exceeds the in-disk ROM capacity, the program will automatically turn to the external Rom space.
When it is set to 0, the program starts to execute from the external memory. For example, if there is no rom 8031 microcontroller in the chip mentioned above, the 8031 pin should be connected to a low level in practical application.
The 8051-piece program storage unit contains 4 kb, and its address is 109h-0fffh. After the single-chip microcomputer starts resetting, the program counter content is 0000 h, so the system will start executing the program from the memory H unit. However, there are some special units in program storage, which should be noted in the usage:
One of the special units is the ipvh-0002h unit. After the system is reset, the PC is 0000 h, and the microcontroller runs the program from the memory H unit. If the program does not start from the memory H unit, an unconditional transfer instruction should be stored in these three units so that the CPU can directly execute the user-specified program.
Another group of special units is 0003h-002ah, which have their own purposes and are evenly divided into five segments. Their definitions are as follows:
0003h-000ah External Interrupt 0 interrupt address zone.
000bh-0012h Timer/Counter 0 interrupt address zone.
0013h-001ah External Interrupt 1 interrupt address zone.
001bh-0022h Timer/Counter 1 interrupt address zone.
0023h-002ah serial interrupt address area.
It can be seen that the above 40 units are the address units used to store the interrupt processing program. After the interrupt response, the program is automatically transferred to the respective interrupt zone for execution based on the interrupt type. It can be seen from the above that each interrupt service program has only 8 bytes, and it is obviously impossible to store an interrupt service program with 8 bytes. Therefore, the above address unit cannot be used to store other content of the program, but can only store the interrupted service program. However, we usually place an unconditional transfer instruction in the address area of the interrupt response to point to other spaces in the program memory that actually store the interrupt service program for execution. After the interrupt response, when the CPU reads this transfer instruction, it turns to other places to continue executing the interrupted service program.

It is the address distribution diagram of RoM:

We can see that there are only three storage units in the 0000 h-0002 h, and the three storage units cannot store programs of actual significance when storing our programs, generally, when writing a program, we arrange an org command here to jump to the user Rom area starting from 0033h through the org command, and then arrange our program language. Users in the user Rom region starting from 0033 can use the org command to arrange it at will, but in the application, please note that the actual storage space should not be exceeded, or the program will not be found.

Data Storage

Data storage is also called random access data storage. Data storage is divided into internal data storage and external data storage. The MCS-51's internal Ram has 128 or 256 bytes of user data storage (different models have their own), a maximum of 64 KB of RAM can be extended off the chip, constitute two address space, ram in the access slice uses the "mov" command, and ram outside the slice uses the "movx" command. They are used to store intermediate execution results and process data. The data memory of the MCS-51 is read and written, and some units are also addressable.
The internal data memory of MCS-51 SCM is divided into two address spaces physically and logically:
Data storage space (128 units );
Special Function register space (up to 128 units );
These two spaces are connected. From the user's perspective, a low 128 unit is the real data storage. The following is a detailed explanation:

Low Unit 128:
The on-chip data storage is an 8-bit address, so the maximum addressable range is 256 unit addresses. The off-chip data storage is indirectly addressable, r0, R1, and dptr can both be used as indirect addressing registers. R0 and R1 are eight-bit registers, that is, the addressing range of R0 and R1 is up to 256 units, dptr is a 16-bit address pointer, and the addressing range can reach 64 KB. That is to say, when the addressing range of off-chip data storage exceeds 256b, R0 and R1 cannot be used as indirect addressing registers, but dptr registers must be used as indirect addressing registers.

We can see that there are 8051 Ram units (00h-ffh) in the 256 single-chip microcomputer, which are divided into two parts. The first is the address from the 00h-7fh unit (128 bytes in total) for the user data Ram. From 80h-ffh address unit (also 128 bytes) to special register (SFR) unit. From figure 1, we can clearly see their structural distribution.

1. General Register area (00h-1fh)
In the 00h-1fh 32 units are evenly divided into four, each containing eight 8-bit registers, are named in R0-R7, we often call these registers as General registers. The registers in these four blocks are called R0-R7, so how to distinguish and use them in the program? Intelligent intel engineers have assigned a register-program status word register (psw) to manage them. The CPU only needs to define the D3 and D4 bits (rs0 and RS1) of the stored psw ), select the four General registers. The encoding relationships are shown in the following table. Four groups are not required in the program, so the rest can be used as a general data buffer. After the CPU is reset, select the 0th group of working registers.

Group	RS1 rs0	R0	R1	R2	R3	R4	R5	R6	R7
0 1 2 3	0 0 0 1 1 0 1 1	00 h 08 h 10 h 18 h	01 H 09 h 11 h 19 h	02 h 0ah 12 h 1ah	03 h 0bh 13 H 1bh	04 H 0ch 14 h 1ch	05 h 0dh 15 h 1dh	06 h 0eh 16 h 1eh	07 h 0fh 17 h 1fh

2. Bit addressing area (20h-2fh)
In-chip RAM, The 20h-2fh unit is the bit addressing area, which can be used as a general unit to address in bytes or their bit. The bit addressing area consists of 16 bytes and 128 digits. The bit address is 00h-7fh. Bit Address Allocation is shown in the following table:

Ram-bit addressing area address table
Unit Address	MSB address LSB
2fh	7fh	7eh	7dh	7ch	7bh	7ah	79 H	78 h
2EH	77 H	76 H	75 h	74 h	73 h	72 h	71 h	70 h
2dh	6fh	6eh	6DH	6ch	6bh	6ah	69 H	68 h
2ch	67 h	66 h	65 h	64 h	63 h	62 h	61 H	60 h
2bh	5fh	5eh	5dh	5ch	5bh	5ah	59 h	58 h
2ah	57 H	56 h	55 h	54 h	53 H	52 h	51 H	50 h
29 H	4fh	4eh	4dh	4ch	4bh	4ah	49 H	48 h
28 h	47 h	46 h	45 h	44 h	43 H	42 h	41 h	40 h
27 h	3fh	3eh	3DH	3ch	3bh	3ah	39 h	38 H
26 h	37 h	36 h	35 h	34 h	33 H	32 h	31 H	30 h
25 h	2fh	2EH	2dh	2ch	2bh	2ah	29 H	28 h
24 h	27 h	26 h	25 h	24 h	23 h	22 h	21 h	20 h
23 h	1fh	1eh	1dh	1ch	1bh	1ah	19 h	18 h
22 h	17 h	16 h	15 h	14 h	13 H	12 h	11 h	10 h
21 h	0fh	0eh	0dh	0ch	0bh	0ah	09 h	08 H
20 h	07 h	06 h	05 h	04 H	03 h	02 h	01 H	00 h

The CPU can directly address these bits and perform operations such as "1", "0", "reverse", transfer, transfer, and logic. We often call MCS-51 a Boolean processing function, and the bucket of Boolean Processing refers to these as addressing areas.

3. User Ram zone (30h-7fh)
In the memory of a single chip, the General registers occupy 32 units, and the bit addressing area occupies 16 units. The remaining 80 units are the general Ram areas for users, the address unit is 30h-7fh. There are no provisions or restrictions on the use of this part of the area, but it should be noted that the stack is generally opened in this area.

High 128 unit: (80h-ffh)
As mentioned above, in the On-chip RAM, the 128-bit high is the dedicated register area. As this section is important, we will arrange a separate lesson to introduce it to you. In the next lesson, we will focus on the 128-bit high RAM in 51 single-chip microcomputer, that is, the dedicated register area.