MIPs instruction set architecture

MIPs instruction set architecture

The instruction set architecture ISA is fully called the instruction set architecture. MIPS has been continuously expanded since it was proposed in 1988. Its ISA is roughly as follows:

MIPs I
This is the basic MIPS instruction set. Earlier r2000 and r3000 processors implemented this instruction set.

MIPs II
R6000 processor introduces this instruction set, which adds commands such as load linked, conditional storage, and branch. The FPU instruction set is also improved to support 64-bit read/write.

MIPs III
The r4000 processor was introduced in 1992. Added 64-bit registers, integer commands, and square root FP commands.

MIPs IV
The r8000 processor implements this Instruction Set and adds the conditional move and square root FPU Instruction Set reciprocal instruction set.

MIPs v
MIPs v proposed in 1994 that it was a specification, but no processor actually implemented the instruction set. The MIPs 64 instruction set is its superset.

Mips32
Is a 32-bit subset of the mips64 instruction set.

Mips64
Is the superset of MIPS v.

Mips32 v2.0 and mips64 V2.0

Application Specific extensions (ASE)

DSP ase
Dsp ase is an optional extension of the 2 Instruction Set of the mips32/mips64 version. It can be used to accelerate a large amount of media computing, especially audio. Because video computing at TV resolution is not within the processing range of a general-purpose processor.
Unlike most MIPS instruction set architectures, there are quite a number of irregular operation sets, many of which are related to some key algorithms.
Compared with the original mips32, it has the following main features:
1) saturating Arithmetic)
2) Fixed-Point Arithmetic on signed 32-and 16-Bit fixed-point fractions with a range of-1 to + 1
3) The existing mips32 instruction set between des integer multiplication and multiply-accumulate which delivers results into a double-size Accumulator
4) SIMD instructions operating on 4 x unsigned bytes or 2x16-bit values packed into a 32-bit register
5) SIMD operations are basic arithmetic, shifts and some multiply-accumulate type operations.

Books on learning MIPS Instruction Sets
MIPs mips architecture
See MIPS run
The MIPs programmer's Handbook