MIPs has 32 General registers ($0-$31). The functions of each register and the usage conventions in assembler are as follows:
The following table describes the aliases and usage of 32 general-purpose registers.
; Register |
Name |
Usage |
$0 |
$ Zero |
Constant 0 (constant value 0) |
$1 |
$ |
Reserved for reserver) |
$2-$3 |
$ V0-$ V1 |
Function call return value (values for results and expression evaluation) |
$4-$7 |
$ A0-$ A3 |
Function call parameters (arguments) |
$8-$15 |
$ T0-$ T7 |
Temporarily (or casually used) |
$16-$23 |
$ S0-$ S7 |
Save (or save/restore) (saved) |
$24-$25 |
$ T8-$ T9 |
Temporarily (or casually used) |
$28 |
$ GP |
Global pointer) |
$29 |
$ Sp |
Stack pointer) |
$30 |
$ Fp |
Frame pointer) |
$31 |
$ Ra |
Return address) |
The following is a detailed description:
$0: that is, $ zero. This register always returns zero, providing a concise encoding form for the useful constant of 0.
Move
$ T0, $ T1
Actually
Add
$ T0, $0, $ T1
The use of pseudocommands can simplify tasks, and assembler provides a richer instruction set than hardware.
$1: $ at. This register is reserved for assembly. Because the immediate numeric segment of an I-type instruction is only 16 bits, the compiler or assembler needs
Split the large constant and re-combine it into the register. For example, loading a 32-bit immediate number requires Lui (loading high immediate number) and addi
Command. Large constants such as MIPS program breaking up and reinstalling are completed by the assembler. The assembler must have a temporary register to reassemble the large constants.
It is also one of the reasons for retaining $ at for compilation.
$2 .. $3 :( $ V0-$ V1) is used for non-floating-point results or return values of subprograms. There is a set of MIPS ranges for how subprograms transmit parameters and how to return them.
Fixed, the content in the stack is loaded into the CPU register in a few locations, and the corresponding memory location is not defined. When these two registers are not enough to store
When the return value is put, the compiler uses memory.
$4 .. $7 :( $ A0-$ A3) is used to pass the first four parameters to the subroutine. Stack is not enough. A0-a3 and v0-v1 along with Ra to support subroutines/processes
To pass parameters, return results, and store return addresses. When more registers are required, a stack is required)
The MIPs compiler always leaves space for parameters in the stack to prevent the storage of parameters.
$8 .. $15 :( $ T0-$ T7) Temporary registers, which can be used by subroutines without being retained.
$16 .. $23 :( $ S0-$ S7) Save the register, which needs to be retained during the process call (saved and restored by the caller, including $ FP and $ RA), MIPS
Temporary registers and storage registers are provided, which reduces the number of register overflow (spilling, the process of placing infrequently used variables into memory ),
When the compiler compiles a leaf (leaf) process (which does not call other processes), it always needs to be used after the temporary register is allocated.
The saved register.
$24 .. $25 :( $ T8-$ T9) same as ($ T0-$ T7)
$26 .. $27 :( $ K0, $ k1) is reserved for operating system/Exception Handling. At least one is reserved. Exception (or interruption) is a type that does not need to be displayed in the program
The process of calling. MIPs has a register called exception program counter (EPC), which belongs to the cp0 register,
Used to save the address of the command that causes the exception. The only way to view the control register is to copy it to the general register. The instruction mfc0 (move from System Control) can copy the address in the EPC to a general register and use the jump Statement (JR ), the program can
Return to the command that causes the exception and continue the execution. MIPs programmers must keep two registers $ K0 and $ K1 for the operating system.
When an exception occurs, the values of these two registers are not restored, and K0 and K1 are not used by the compiler. The exception handler can put the return address here.
Use JR to jump to the command that causes the exception and continue the execution.
$28 :( $ GP) to simplify access to static data, MIPS retains a register: Global pointer GP (Global pointer, $ GP), Global pointer
Only the IP address determined during the running of the static data zone is required. When you access data within the range of 32 KB of the GP value, you only need one GP-based address.
Pointer command. During compilation, the data must be within the 64 kB range of the GP-based pointer.
$29 :( $ SP) MIPS hardware does not directly support stacks. You can use it for other purposes, but to use others' programs or allow others to use your program
But it has nothing to do with hardware.
$30 :( $ FP) the gnu mips c compiler uses the frame pointer, which is not used by the sgi c compiler.
Memory register usage ($ S8), which saves the call and return overhead, but increases the complexity of code generation.
$31 :( $ RA) stores the return address. MIPS has a Jal (jump-and-link, jump and link) command. When you jump to an address
Put the address in $ Ra. Used to support subroutines. For example, the caller places the parameter in $ a0 ~ $ A3, and then the JAL x jumps to the X process.
Put the result in $ v0, $ V1, and return it using Jr $ Ra.
In addition, MIPS controls the CPU through the coprocessor 0 (cp0.
References: http://hi.baidu.com/qq520131714/blog/item/f28933245603072cd40742a6.html MIPS Assembly tips
Backtrace Implementation of http://blog.csdn.net/jerryutscn/archive/2010/03/10/5365263.aspx Based on MIPS architecture
