MIPS General Purpose Register + instruction

Reprinted from http://blog.csdn.net/gujing001/article/details/8476685

MIPS Universal Register

MIPS has 32 general-purpose registers ($0-$31), the functions of each register and the use of the assembly procedures are as follows:

The following table describes the aliases and uses of 32 universal registers

REGISTER	NAME	USAGE
$	$zero	Constant 0 (constant value 0)
$	$at	Reserved to assembler (Reserved for assembler)
$2-$3	$v 0-$v 1	function call return value (values for results and expression evaluation)
$4-$7	$a 0-$a 3	function call parameters (arguments)
$8-$15	$t 0-$t 7	Temporary (or casual)
$16-$23	$s 0-$s 7	Saved (or if used, requires Save/restore) (saved)
$24-$25	$t 8-$t 9	Temporary (or casual)
$28	$gp	Global pointer (Globals Pointer)
$29	$sp	Stacking pointer (stack Pointer)
$	$fp	Frame pointer (frame Pointer)
$31	$ra	return address

Detailed instructions are given below:
$: That is $zero, the register always returns zero, providing a concise coding form for the useful constant of 0.
Move $t 0, $t 1
Actually for
Add $t 0,$0, $t 1
Using pseudo-directives can simplify tasks, and assembler provides a richer set of instructions than hardware.
$: That is $at, the Register is reserved for assembly, because the immediate number field of type I instruction is only 16 bits, when the large constant is loaded, the compiler or assembler needs
The large constants are disassembled and then re-assembled into the registers. For example, loading a 32-bit immediate number requires Lui (loading the high-level immediate number) and Addi two
Instructions. Like the MIPS program to break up and reload the large constant by the assembler to complete, the assembler must have a temporary register to reorganize the large constant, which
is also one of the reasons for preserving $at for the assembly.
$2..$3: ($v 0-$v 1) A non-floating-point result or return value for a subroutine, for how the subroutine passes the parameter and how to return it, the MIPS range has about
stored in the CPU register, and the corresponding memory location remains undefined when the two registers are not sufficient
When the return value is placed, the compiler completes it through memory.
$4..$7: ($a 0-$a 3) is used to pass the first four parameters to the subroutine, not enough to use the stack. A0-a3 and V0-v1 together with RA to support subroutines/procedures
Called, respectively, to pass parameters, return results, and store return addresses. Stack is required when more registers are needed
, the MIPS compiler always leaves space in the stack for parameters in case there are parameters that need to be stored.
$8..$15: ($t 0-$t 7) temporary registers, which can be used by subroutines without reservation.
$16..$23: ($s 0-$s 7) holds registers that need to be preserved during procedure calls (saved and restored by the caller, including $FP and $ra), MIPS
Temporary registers and save registers are provided, which reduces the register overflow (spilling, the process of putting infrequently used variables into memory),
The compiler always compiles a leaf (leaf) process (which does not call other processes) and uses it only when the temporary registers have been allocated.
The saved register.
$24..$25: ($t 8-$t 9) Same ($t 0-$t 7)
$26..$27: ($k 0, $k 1) reserved for OS/exception handling, at least one reserved. An exception (or interrupt) is one that does not need to be displayed in the program
invokes the procedure. MIPS has a register called the Anomaly Program counter (Exception Programs COUNTER,EPC), which belongs to the CP0 register,

The address of the instruction that is used to hold the exception. The only way to view the control register is to copy it into the General register, and the instruction MFC0
(move from System control) to copy the addresses in the EPC to a common register, via the Jump Statement (JR), the program can return
Return to the command that caused the exception to continue execution.        MIPS programmers must keep two registers $k0 and $K1 for the operating system to use. When an exception occurs, the values of the two registers are not restored, the compiler does not use K0 and K1, and the exception handler can place the return address in this
Either of the two, and then use JR to jump to the command that caused the exception to continue execution.
$28: ($GP) to simplify access to static data, the MIPS software retains a register: global pointer GP (pointer, $GP), global pointer
Only the address that is determined by the runtime in the static data area, when accessing data that is within the 32KB range of the GP value, requires only a GP-based
The instruction of the pointer. At compile time, the data must be within the 64KB range of the GP-based pointer.
$29: ($SP) MIPS hardware does not directly support the stack, you can use it for other purposes, but in order to get someone else's program or use your
The contract, but it has nothing to do with the hardware.
$: ($fp) The GNU MIPS C compiler uses the frame pointer (frame pointer), and the SGI C compiler does not use this register as a
Memory registers ($s 8), which saves the call and return overhead, but increases the complexity of code generation.
$31: ($ra) store The return address, MIPS has a JAL (Jump-and-link, jump and link) instruction, when jumping to an address, the next command of the
The address is placed in the $ra. Used to support subroutines, such as calling a program to put parameters into the $a0~ $a 3, then Jal x jumps to the X process, when the process is completed

Put the results in $v0, $v 1, and then return using the JR $ra.

MIPS Instructions

Instructions	Function	Application examples
Lb	Reads a byte of data from the memory into the register	LB R1, 0 (R2)
Lh	Reading half-word data from memory into registers	LH R1, 0 (R2)
Lw	Reads a word from memory into the register	LW R1, 0 (R2)