MSP430 Power Supply Learning

Source: Internet
Author: User

Power Management Module ( PMM ) and power supply monitoring introduction

Power Management Module and supply Voltage Supervisor

I think power management and monitoring is a very complex and difficult to control part, not only involves

The choice of source mode involves complex interrupts, how interrupts are handled, and so on. Although it is helpful to achieve the goal of reducing power consumption, it seems to us that the term "power consumption" is a little bit far away. In addition, this part of the control of the prevention and Treatment of power accidents (too low, etc.) is very helpful, but it seems that the Development Board if not independent of the project and just connected to the computer USB Power, there is generally no problem. So, I just want to learn a little bit. (There will be a chance to learn more later).

The I/O port and all analog units including the crystal oscillator are powered by the DVCC . The Memory (Flash and RAM) and the digital unit are powered by the core voltage VCORE .

DVCC : wide supply voltage range 1.8v-3.6v;

VCORE : The DVCC is a two-time core voltage generated by a low dropout voltage regulator (LDO)that is specifically powered by the CPU 's digital logic, with a total of 1.4V(0-12mhz), 1.6V(0-16mhz), 1.8V(0-20mhz) and 1.9V(0-25mhz) four levels. The minimum allowable voltage of the VCORE is dependent on the MCLK size chosen, which means that the high frequency requires a higher VCORE.

Management will generate a reset (mainly during power-up), and the monitoring will generate interrupts (monitoring voltage is too low).

Our most common use is to set the core voltage VCORE , fortunately there is a special library of functions hal_pmm.c/h .

in this library, in addition to the definition of some settings, the most important thing is to define three functions:

Setvcoredown (uint8_t level): Lower core voltage

setvcoreup (uint8_t level): increase core voltage

Setvcore (uint8_t level): directly set core voltage (0-3 total four levels)

/* This function is the most important, or there is this one, the front two does not need to */

Five , System operating mode

In the fourth chapter, we mentioned that we can start from the power layer to control the power dissipation from the source. In this chapter we will talk about the CPU operation mode, how to control the power consumption from the sub-level.

In different operating modes, the CPU will disable some modules to achieve the purpose of controlling power consumption.

(PS: The same sentence, "Power consumption too far", generally will not change the working mode, so simple learning)

Brief introduction of a few words: Change of working mode will take effect immediately;

When an interrupt occurs, the current mode setting information is saved for recovery (unless the operating mode is changed in the Interrupt Service program) ;

in LPM4.5 mode, PMM Power regulation will not take effect, all RAM and registers will be lost, but I/O port status will be locked;

from LPM4.5 wake Up, a set of special procedures, interested to see;

The following diagram is interesting to see clearly the process and direction of the transition between work modes, how each mode of work is set, and which parts are controlled.

BOR: brown-out reset low voltage detection reset (undervoltage reset)

POR: power-on reset power-on reset

PUC: power-up Clear power-on removal

The light section represents an event, and the dark part represents an action or setting

Set the operating mode is mainly set register SR SCG0, SCG1, Oscoff, Cpuoff

Bit, the AM (Active mode) mode is four-bit zero, and the system defaults to AM mode;

In addition to AM, the rest is low-power mode, the processor enters the low-power mode, usually by the interrupt to wake up. Can be an external interrupt, or it can be an internal timer interrupt;

LPM0-LPM4 mode, the peripheral module will work properly, and the RTC clock will not stop;

To enter LPM4.5 this mode (less use), just on the basis of LPM4 more than one pmmregoff set. In this mode, all clocks, memory, and supervisory management mechanisms of the system are stopped, and even real-time clock RTC is disabled.

LPM0 and LPM1 a group, in addition to the characteristics shown, this mode SMCLK is the selection (Smclkoff =0), the DCO clock source if it is ACLK or SMCLK, then DCO is also valid;

LPM2 and LPM3 a group, in addition to the characteristics shown, the SMCLK is prohibited in this mode, DCO clock source if it is ACLK, then DCO is also valid;

The MSP430 header file has a detailed definition of the low-power mode, such as: to enter the low-power mode 0, you can write the LPM0 directly in the program; Enter low-power mode 4 to write LMP4 directly. Exit the low-power mode as follows:

Lpm0_exit; Exit low-Power mode 0 // too easy to have wood there

Lpm4_exit; Exit Low Power Mode 4 (exceptLPM4.5 )

Summarize the experiment: a very interesting program

/* Low-power mode embodiment, without infinite loops, the program will not terminate */

/* You will notice that the statements behind LPM3 will not be executed, and the program will only perform the interrupt service program on a regular basis, because MCLK and SMCLK and FLL are forbidden in LPM3 mode */

#include <msp430.h>

void Main (void)

{

WDTCTL=WDTPW+WDTCNTCL+WDTTMSEL+WDTIS1+WDTIS0;//WDT for Timers

Sfrie1|=wdtie; Open watchdog interrupt

P1dir|=bit1+bit2; P1.1 led, set to output direction

P1out=bit1+bit2;

__enable_interrupt (); Open Total Interrupt

_BIS_SR (GIE); This sentence means that the total interruption of the opening

/* Master a usage here _bis_sr (): Place the variable in parentheses */

LPM3; Enter LPM3 low power mode, SMCLK is disabled in this mode

p1out&=~bit2;//This sentence can not be executed, so P1.2 will remain constant light, and will not darken

}

#pragma vector=wdt_vector

__interrupt void watchtimer(void)

{

P1out^=bit1; Timed rollover to achieve flicker

}

MSP430 Power Supply Learning

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