OC, OD, line or line and logic

1. What is OC and OD?

Open collector gate (open collector oC or open source OD)
Open-drain refers to the open-collector output, that is, the open-collector output in TTL.It is generally used for wire or, wire and some are also used for current driving.
Open-drain is for MOS tubes, and open-collector is for bipolar tubes, there is no difference in usage.
Open-drain circuit has the following features:
1. Use the drive capability of the external circuit to reduce the internal drive of the IC.Or drive load higher than the chip power supply voltage.
2. You can connect multiple pin pairs with open/missing output to an online line. A logical relationship is formed by means of an up-pull resistor without adding any device. This is also I2C, SMBusAnd other bus to determine the principle of bus occupation.If it is used as a totem output, it must be connected to the pulling resistance. When the capacitive load is connected, the descent delay is the transistor in the chip, which is the active drive and the speed is fast. The Descent delay is the passive external resistance, and the speed is slow. If the speed and high resistance are required, the power consumption will be high. Therefore, the choice of load resistance should take into account both power consumption and speed.
3.You can change the transmission level by changing the voltage of the pull-up power supply.For example, the TTL/CMOS level output can be provided by adding a pull-up resistor.
4.Leakage exposurePinOnly low levels can be output without connecting external pull-up resistors.In general, open-drain is used to connect devices of different levels.
5. The normal CMOS output level is the upper and lower two tubes. Remove the above pipes as open-drain. This output has two main purposes: level conversion and line and.

6. Open the path due to leakageThe back-level circuit must be connected to an upstream resistor. The power supply voltage of the upstream resistor can determine the output level.In this way, you can convert any level.
7. the cables and functions are mainly used when multiple circuits are used to pull down the same signal. If the current circuit does not want to pull down, It outputs a high level because the pipe above open-drain is removed, high level is achieved by external pull-up resistance. (For a normal CMOS output level, if one output is high or the other is low, it is equal to a short circuit of the power supply .)

8. Open-drain provides a flexible output mode, but it also has its weakness.Delay of the rising edge. Because the rising edge is throughExternal pull-on passive resistance for load ChargingTherefore, when the resistor is selected, the latency is small, but the power consumption is high; otherwise, the delay is large and the power consumption is small. So ifIf latency is required, we recommend that you use the descent edge output..

2. What is line or logic and line and logic?

Connects a pull-up resistor to the power supply at a node (line ).
VCC orVDDAnd
N NNS
Or the collector C or drain D of the NMOS transistor,
The emission pole e of these transistors
Or source Pole s
All are connected to the geographic line,If one transistor is saturatedThis node (line) is pulledGround Power flat.
Because the base pole of these transistors is injected with current () or the gate is added with a high level (NMOS ),The transistor is saturated.,So the relationship between these base poles or gate nodes (wires) is or not
Nor Logic.
If this node is followed by an inverter,
Or logic.

Note: personal understanding:Wire and, and connect the resistor to the power supply. (~ A )&(~ B) = ~ (A + B) the concept of this concept is easily understood by the formula;

If the drop-down resistor and PNP or PMOS are used
And non-Nand
Logic,
Or use a negative logical relationship to convert and/or logic.

Note:Wire or drop-down resistor to the ground. (~ A) + (~ B) = ~ (AB );
These transistors are often the open collector oC or open source OD of some logical circuits.
Output end.This logic is usually called line and/line or logic,When you see some chips
OC or OD
The output end is connected together,
When there is a pull-up resistor, this is the line or/line, but sometimes the pull-up resistor is made in the input end of the chip..
By the way, if it is not oC or OD
The output end of the chip cannot be connected together. Bus
The two-way output end is connected togetherManagedAt the same time, only one output can be used, while otherIs a high-impedance stateOnly.

3. What is a push-pull structure?
Generally, the two transistors are controlled by the two complementary signals, and are always at the same time when one transistor is turned on. To achieve the line and the need to use OC (open
Collector) door circuit. if there are two transistors in the output level, they are always in one conduction and one cutoff state, that is, two three-level tubes are pushed and connected. Such a circuit structure is called a push-pull circuit or a totem-pole) output Circuit (unfortunately, the figure cannot be attached ). When the output power is low, that is, when the lower-level load gate inputs low, the output current is when the lower-level load gate inputs T4; when the output power is high, that is, when the lower-level load gate inputs High, the current at the output end will be the downstream door
T3, d1
Pull out. In this way, the output is usually high and low, T3 and T4
It will work in turn, reducing power consumption and improving the affordability of each pipe. Regardless of the path, the on-resistance of the pipe is very small, so that the RC constant is very small, and the transformation speed is very fast. Therefore, the push-pull output level not only improves the load capacity of the circuit, but also increases the switching speed. For your reference.
The push-pull circuit is a three-circuit transistor or transistor with the same parameters. It exists in the circuit in the push-pull mode. It is responsible for waveform amplification tasks of plus or minus half weeks. When the circuit works, the two symmetric power switches have only one on-going switch at a time, so the low conduction loss is highly efficient.
The output can either inject current to the load or extract current from the load.