Old text backup: Two ways to implement multiple virtual timers with one timer

1. fixed-period method

   Using a hardware timer for a fixed period (such as 1ms) timing, a structure array as a soft timer description table, the number of structure of the array is the maximum number of virtual timers, each member of the structure includes the virtual timer state (idle, active, run, timeout trigger, periodic trigger), timing value ( Conversion to the timing period, such as 1ms hardware timing period, now 125ms timing, timing value is 125), identification ID and callback function, and so on, with a variable as a timing cycle counter, each time into a timer interrupt, reset timer, scan structure array of each member structure, To do a reduction of the time value of the operation, and then determine whether the timing value is 0, is to determine the value corresponding to the virtual timer timing, call the corresponding callback function for the corresponding processing. So reciprocating. For example, there are three timing requirements, respectively, 30ms, 80ms, 62ms, hardware timing cycle 1ms and with the system after the initialization has been running, after each time interrupt to scan the structure of the array, in a timed interrupt after the exit, the 30ms timed task came, To find a structure initialized to activate its state set timer value 30, another hardware timing interrupt to, set the structure of the state for running, start timing, and after 14 hardware timing cycle, the timing value becomes 15, this time the second scheduled task came, the new virtual timer structure set the timer value 80 and its status is activated, Again after 10 timing period, the two structure timing values are 5 and 71, then the third time task to come, ibid again activate a member structure and set the time value of 62, and then 5 hardware timing period interrupt 30ms timing expires, Set the corresponding structure state idle release the virtual timer and call the callback function by setting the callback function pointer, there are 2 scheduled tasks running, a value of 66, another value of 58, and then after 58 and 66 hardware timing cycle After the scheduled task is completed, This describes a typical process that uses fixed hardware timing cycles to perform multiple scheduled tasks, where there are two problems, one being that the virtual timer activates after the next hardware timer is interrupted, which means that there may be a timing error (delay) near a hardware timing cycle, If there is no activation of the direct operation is also likely to be a hardware timing cycle timing error (advance), in short, this method must have a hardware cycle timing error; The second problem is that the structure array scan, operations, and possible callback functions in a timed interrupt consume CPU instruction cycles, It is bound to make the timing interrupt function execution time longer has the potential to affect other interrupt response, so pay attention to the hardware interrupt in the global interrupt, allow other interrupt response, and the hardware timer value reset to reset to avoid the hardware timing cycle accuracy, and must ensure the hardware timing cycle to complete the interrupt program To avoid breaking the re-entry.

2. Floating timing method

   Timer We also only use one, the interface function is to set the hardware timer and to get the timer run time remaining, there is a timer interrupt will call the interrupt function, resources so, we also have to pass the software to the virtual timer. The hardware timer has the relevant timing register resources to set timing time and some configuration parameters, software to simulate also need timing time and configuration parameters to describe this timer, here we use a structure to save these parameter data, its members include: Timer state (idle, active, in use, timeout trigger, periodic trigger) , global struct pointer, callback function pointer (for timer time to call trigger function), ID (used to identify timer), timing time, and timing period (0 for non-cycle). Because you want to virtual multiple timers, this structure will become an array of structures. OK, the description parameter table of the virtual timer has, how to realize the timing function? Now assume that to achieve 3 scheduled tasks, Task 1 to achieve 2 seconds of timing, Task 2 to achieve a 3-second timing, Task 3 to achieve a 1-second timing. First use the virtual timer set function to set the 2-second timing value to the virtual timer parameter structure [0] (Virtual Timer 1), start the hardware timing of 2 seconds, and then set the parameter structure [0] of the timer state is in use, then the virtual Timer 1 starts to work, then sets the Task 2, Find the free virtual time parameter structure of the body array, is the structure [1] (Virtual timer 2), the time value of 3 seconds to write to the structure, and then get the hardware timer run the remaining hours, assuming that there are 1.5 seconds time, less than 3 seconds to write, the hardware timer continues to run, set the parameter structure [1] Timer status is in use, it means that the virtual Timer 2 began to work, and finally set up task 3, find the idle virtual time parameter structure of the array, is the structure [2] (Virtual timer 2), the time value of 1 seconds to write to the structure, and then get the hardware timer run for the remaining hours, Assuming there is a 1.2-second timer, then task 1 corresponds to the virtual timer parameter structure [0] time remaining 1.2 seconds, structure [1] remaining timing time (2-1.2) = 2.2 seconds, and then determine the remaining timing time which is the smallest, is the structure [2] of the timing value (1 seconds), Set the hardware timer 1 seconds, the total timing time variable value is (2-1.2) +1=1.8 seconds, the parameter structure [2] of the timer state is in use, the virtual Timer 3 began to work, and then there is no need for scheduled tasks, waiting for 1 seconds time to the timer, call the timer interrupt processing function, This function query to the end of the timed trigger structure [2] corresponding to the virtual Timer 3 timing time to determine that the task 3 timing time to, then perform task 3 corresponding to the Timed trigger function bar, then the structure [0] and structure [1] The timing value minus the total timing time (1.8 seconds) to get 0.2 seconds and 1.2 seconds, and then set 0.2 seconds hardware timing, release the virtual Timer 3, timed to after the corresponding task 1 trigger function is executed,Virtual Timer 1 Complete is released, finally set 1.2-0.2=1 second timing, timing time to After, perform task 2 corresponding to the trigger function, virtual Timer 2 was finally released. At this point three timed tasks to achieve the purpose of parallel execution, that is, with 1 hardware timers to achieve the parallel 3 timing tasks, not equivalent to 3 timers running at the same time, to achieve the purpose of multiple timers! In the same way more than 3 timing tasks can easily be achieved, and is a wide timing time, because the above method to achieve the timing of time segmentation, of course, the long time can be divided into more than one segment of nature to meet the requirements of the hardware timer, and the realization of periodic timing is no problem. This method is more complex than the fixed-period method, but it can avoid the error of a time period, and the efficiency is higher, and the timing interrupt response is reduced, but the problem is still some, the next time period is determined in the time of the interrupt, the calculation time forms the error (delay), However, the calculation of the control of the good words compared to the fixed-cycle method of a period of error is much smaller, and the increase in complexity means that the execution of the program in the interrupt time is also increased, and the variable timing period should be more careful to avoid interrupt re-entry.

4. Summarize

   Of course, most of the above two methods of interrupt response program can be placed in the interrupt program outside the operation, that is placed in the system cycle, but this situation has formed a new error is this large cycle. If this is to be done, then the delay of the cycle of this large cycle should be allowed within the real-time error of your timing. After all, virtual timers are virtual, it is impossible to achieve the accuracy of the hardware timer, but in many applications is still very useful and essential.

   The above two methods have been implemented in AVR MCU and PC, the effect is also good. The first method is more suitable for single-chip microcomputer, the second method has advantages on PC.

Old text backup: Two ways to implement multiple virtual timers with one timer