Operating system-Virtual memory management

Interview Questions Summary:

1. Logical address, linear address, physical address, what the virtual address is, respectively

Physical Address, the address of the CPU address bus, and a large part of the physical address is left to the memory in the memory bar

Linear Address ( Linear address) also known as virtual addresses is the middle tier between logical addresses and physical address transformations. In a segmented part, the logical address is the offset address in the segment, and the base address is the linear address.

The logical address is the address transformation function of the computer, the address (operand) given by the visit is called the logical address, also known as the relative address, which is the machine language instruction, used to specify an operand or an address of an instruction. The actual valid address in the internal memory is the physical address that is to be computed or transformed by the addressing method. A logical address consists of two parts, the segment identifier: The offset within the segment. A segment identifier is made up of a 16-bit long field called a segment selector.

2. The pros and cons of Segment-and page-managed management.

3.physical and virtual storage space layouts in Linux

http://blog.csdn.net/tianyahaijiaozd/article/details/6784239

1. Conversion between virtual and physical addresses in Linux

80386 the conversion of a logical address to a physical address is divided into two steps: 1. Segment conversion (segment convert): logical address translated to linear address; 2. Page convert: Linear address translates to physical address

Segment conversion: First find the corresponding position in descriptor table (GDT) According to sector, find descriptor descriptor, BASE,LIMIT,TYPE,DPL in each descriptor item, find the starting address of the segment based on base (in linear address), and then offset to get the linear address

Page conversions: The first 10 bits of a linear address are the index locations in page dircetory, where page directory holds the physical address of the page table, and the second 10 bits of the linear address can have its index position in the page table, plus the page The physical address of the table, which can get the PTE of that address. The physical address corresponding to the address is recorded in the PTE

2. Global Descriptor descriptor GDT and local descriptor descriptor for LDT

1. Overview

80386 the transformation of addresses in the architecture (logical address---> Physical address) is divided into two phases:

(1) Logical address--------> Linear address (segment translation)

(2) Linear address---------> Physical Address (page translation) [optional]

If there is no page conversion, then the linear address is the physical address (for example, the boot loader before the page translation is turned on, the linear address is the physical address)

The process of segment address translation needs to be used to the Global Descriptor Table GDT (GLOBALS) and local Descriptor Table (destriptor) LDT (local destriptor)

A descriptor table is simply a memory array of 8-byte entries that contain descriptors

Logical ADDRESSS |------Selector-----|----------Offset----------------|

The selector of the logical address is used in the Index descriptor table of the entry, each entry is 8B, plus the base address, you can get the location of the descriptor sheet, and take the contents of the paragraph address of the location

2.GDT and the LDT and the relationship between the two

GDT (Global destriptor Table): Each CPU corresponds to a GDT, which can be stored anywhere in memory, but the ingress address (base site) is stored in register (GDTR), and programmers can use LGDT and SGDT for load and The entry address of the store GDT

LDT (Local destriptor Table): Each process is a LDT, the entry address is stored in the register (LDTR), the programmer can only use Lldt and Sldt for load and store

The relationship between the two:

GDT can be understood as a Level descriptor table, the LDT is a level two descriptor table, (similar to the first page table and the two-level page tables), each process of the LDT is also a memory, so it also has a segment descriptor, this descriptor is stored in the GDT

Each process has its own program segment, data segment, heap section, stack segment, with the LDT, can be each process of code segment, data segment, heap segment, stack segment package together, By finding the location of the different LDT in the GDT and then changing the LDTR, you can switch between different processes.

3. Segment Register (Segment register)

CS (cose segment), SS, DS (data segment), ES, FS, GS, the purpose of using segment register is to avoid memory access every time the process accesses the address

The physical address is the address of the actual physical memory, and the logical address is the address used by the program instruction. The purpose of a page table is to implement a mapping of logical addresses to physical addresses.

x86 32-bit address, Top 20 for page table lookup

3. Page table and page table entries

tlb Effect

Since the page table is stored in main memory, it takes at least two times for each time the program is visited: one time to fetch the physical address and the second time to retrieve the data. Imagine the absence of a TLB in the X86_32 schema, access to a linear address, first obtaining PTEs from the PGD (first memory access), obtaining the Page box address (second memory access) in the PTE, and finally accessing the physical address, which requires 3 RAM access.

If a TLB is present and the TLB hits, then only one RAM access is required. When the CPU accesses a virtual address/linear address, the CPU is looked up in the TLB first based on the high 20 bits of the virtual address (20 is x86 specific, different schemas have different values). If there is no corresponding table entry in the table, called TLB Miss, the corresponding physical address needs to be computed by accessing the page table in slow RAM. At the same time, the physical address is stored in a TLB table entry, and later access to the same linear address, directly from the TLB table entry to obtain the physical address, called the tlbhit. The basic unit of the TLB is the page table entry, which corresponds to the page table entry stored in RAM. The size of the page table entry is fixed, so the greater the TLB capacity, the More page table entries you can hold, and the more likely the TLB hit will be. However, the TLB capacity is limited after all, so the Ram page table and the TLB page table entries do not correspond to one by one. So the CPU receives a linear address, so it has to make two quick judgments:

1 required also indicates that no has been cached within the TLB (TLB Miss or TLB hit)

2 which entry in the TLB is required for the page table

4. Protection mechanism of the address

Protection mainly includes the following points:

The process does not allow the modification of its read-only text segment to not allow it to read or modify any kernel code and data structures that do not allow it to read or write to other processes that are not allowed to modify virtual pages that are shared with other processes unless all the sharer is shown to allow it to do so

5. Missing pages Interrupt process

After a missing pages break, those operations are performed.

When a process occurs with a missing fault, the process falls into the kernel state and performs the following actions:

1. Check if the virtual address you want to access is legitimate

2. Find/Assign a physical page

3, fill the physical page content (read the disk, or directly set 0, or do nothing)

4. Establish a mapping relationship (virtual address to physical address)

implementation of virtual memory in 6.Linux

There is an entry mm_struct in Task_struct that describes the current state of the virtual memory. PGD and mmap Two variables, PGD points to a linked list of page directory,mmap that point to a vm_area_structs (area structure, segment), where each vm_area_structs describes a region of the current virtual address. When the kernel runs the process, it stores the PGD in the CR3 control register

Vm_area_structs: Vm_start, Vm_end,..

6. Dynamic Memory allocation

the difference between 1.malloc, Vmalloc, Kmalloc

Kmalloc and Vmalloc are allocated kernel memory, malloc allocates the user's memory kmalloc to ensure that the allocation exists physically continuous, vmalloc is guaranteed to be contiguous on the virtual address space, and malloc does not guarantee anything (this is their own guess, Not necessarily correct) Kmalloc can allocate a limited size, vmalloc and malloc can allocate a relatively large amount of memory to be accessed by DMA only when the physical continuous vmalloc is slower than Kmalloc

2.malloc Splitter Algorithm

(1) How to implement malloc and Free,slab algorithm, buddy algorithm

(3) In what circumstances malloc calls Mmap.

From the operating system perspective, the process allocates memory in two ways, with two system invocations: BRK and mmap (regardless of shared memory). BRK is to push the highest address pointer of the data segment (. data) _edata toward the high address, mmap is to find an idle piece in the virtual address space of the process (usually the middle of the heap and stack). Both of these methods allocate virtual memory and no physical memory is allocated. In the first access to the allocated virtual address space, a page break occurs, the operating system is responsible for allocating physical memory, and then establish a mapping between virtual memory and physical memory.

In the standard C library, Malloc/free function allocations are provided to release memory, which is implemented by brk,mmap,munmap these system calls.