Original + reprint STM32 of the knowledge and use of DMA __stm32

What is DMA.
DMA (direct Memory access, directly memory access) is an important feature of all modern computers, allowing different speeds of hardware devices to communicate without relying on a large amount of interrupt load on the CPU. Otherwise, the CPU needs to copy each fragment of data from the source to the register and then write it back to the new location. In this time, the CPU is not available for other jobs. (Baidu Encyclopedia)
DMA can be considered a data porter

What is the use of DMA.
Direct memory access is used to provide high-speed data transmission between peripherals and memory or between memory and memory. Without CPU intervention, the DMA data can be moved quickly. This saves CPU resources to do other things.

Stm32 How much resources there are.
There are two DMA controllers, the DMA1 has 7 channels, and the DMA2 has 5 channels.

Data from where to where.
Peripheral to SRAM (I2c/uart and so on to obtain data and into SRAM);
Between two regions of the SRAM;
Peripheral to Peripheral (ADC reads data and sends it to TIM1 to control it to produce different PWM duty-free ratios);
SRAM to peripherals (SRAM stored in the pre-saved data into the DAC to generate a variety of waveforms);
And so on and so on.

Use of DMA:
How to enable DMA. First, it is well known that initialization is initialized before any device is enabled, to initialize a module, you need to understand the structure of the module and its functions so that you can set it correctly; Due to the complexity of DMA, I'll just talk about the basic structure of DMA and common functions, which are provided by ST companies in library functions.
Emphasize content

1, the following code is a standard DMA settings, of course, the actual application can be reduced according to the actual situation:
Dma_deinit (DMA_CHANNEL1);
The above sentence is for DMA configuration channel, according to St's information, DMA in STM3210FX contains 7 channels (CH1~CH7), that is to say, can provide 7 "bridges" for peripherals or memory (please allow me to use the word bridge, I think it's easier to understand, haha, don't "shoot bricks" ah.) ）；
DMA_INITSTRUCTURE.DMA_PERIPHERALBASEADDR = adc1_dr_address;
The dma_initstructure in the above statement is a DMA structure that is declared in the library and, of course, is defined first, and DMA_PERIPHERALBASEADDR is a data member in the structure, giving DMA a starting address, Like a buffer starting address, the data flow is: Peripheral register àdma_peripheralbaseaddàmemory in the variable space (or flash data space, etc.), adc1_dr_address is an address variable i defined;
Dma_initstructure.dma_memorybaseaddr = (u32) adc_convertedvalue;
The above sentence is clearly the DMA to be connected in the memory of the variable address, adc_convertedvalue is my own in the memory definition of a variable;
Dma_initstructure.dma_dir = DMA_DIR_PERIPHERALSRC;
The above sentence is set DMA transmission direction, as I said before, DMA can be two-way transmission, can also be one-way transmission, here set is one-way transmission, if the need for two-way transmission: To change the DMA_DIR_PERIPHERALSRC to Dma_dir_ PERIPHERALDST can be.
Dma_initstructure.dma_buffersize = 2;
The above sentence is set DMA in the transmission of the buffer length, preceded by the definition of buffer starting address: adc1_dr_address, for security and reliability, generally need to define a storage area buffer, this parameter has three types of units: Byte, Halfword, Word, I set the 2 Half-word (see settings below), 32-bit MCU 1 half-word bits.
Dma_initstructure.dma_peripheralinc = dma_peripheralinc_disable;
The above sentence is to set the DMA peripheral increment mode, if the DMA selected channel (CHX) has multiple peripheral connections, the need to use peripheral incremental mode: dma_peripheralinc_enable; In my example DMA is only associated with ADC1, so choose Dma_ Peripheralinc_disable
Dma_initstructure.dma_memoryinc = dma_memoryinc_enable;
The above sentence is to set the DMA memory increment mode, DMA access to multiple memory parameters, you need to use dma_memoryinc_enable, when DMA access to only one memory parameter, can be set to: Dma_memoryinc_disable.
Dma_initstructure.dma_peripheraldatasize = Dma_peripheraldatasize_halfword;
The above sentence is to set the data length for each operation of DMA at access time. There are three types of data lengths that have been mentioned before and are not described here.
Dma_initstructure.dma_memorydatasize = Dma_memorydatasize_halfword;
Identical to the above. No longer explained here.
Dma_initstructure.dma_mode = Dma_mode_circular;
The above sentence is set DMA transmission mode: Continuous cycle mode, if only want to visit once after do not access (or by the command operation to ask the question, that is, want it to visit when the visit, do not it when the visit to stop), you can set the general mode: Dma_mode_normal
dma_initstructure.dma_priority = Dma_priority_high;
The above sentence is to set the DMA priority level: can be divided into 4 levels: Veryhigh,high,medium,low.
dma_initstructure.dma_m2m = dma_m2m_disable;
The above sentence is set DMA in the 2 memory variables are accessed by each other
Dma_init (dma_channel1,&dma_initstructure);
In front of those are the DMA structure members of the settings, in the second unified DMA the entire module to do one initialization, so that the DMA members and the parameters above the same.
/DMA enable/
Dma_cmd (dma_channel1,enable);
Ha ha. This sentence I think I will not wordy, we can see it.
At this point, the entire DMA has been set up, but how the DMA channel is connected with the peripherals. Haha, this is also the most I want to know one thing, don't worry. Let me have a sip of tea ~ hahaha.
To establish a valid connection between DMA and peripherals, this is not DMA itself, it is a peripheral thing, each peripheral has a xxx_dmacmd (xxxx,enable) function, and if DMA is established with ADC, the Adc_dmacmd is used (ADC1, Enable); (Here I have enabled the ADC1 module in ADC).

A simple example:

/* DMA1 CHANNEL6 Configuration * * Dma_deinit (DMA1_CHANNEL6);
  Peripheral base Address dma_initstructure.dma_peripheralbaseaddr = (uint32_t) src_const_buffer;
  Memory Base Address Dma_initstructure.dma_memorybaseaddr = (uint32_t) dst_buffer;
Data transfer Direction Peripheral is source dma_initstructure.dma_dir = DMA_DIR_PERIPHERALSRC;
   Buffer size number of data to is transferred (0 to 65535). Data transfer dma_initstructure.dma_buffersize = buffersize;
  The peripheral address Register is incremented dma_initstructure.dma_peripheralinc = dma_peripheralinc_enable;
The memory address register is incremented dma_initstructure.dma_memoryinc = dma_memoryinc_enable; 
The peripheral data width dma_initstructure.dma_peripheraldatasize = Dma_peripheraldatasize_word;
Dma_initstructure.dma_memorydatasize = Dma_memorydatasize_word;
Dma_initstructure.dma_mode = Dma_mode_normal;
dma_initstructure.dma_priority = Dma_priority_high; The Dmay channelx is used in meThe operation of the mory-to-memory transfer//DMA channel can be performed without a peripheral request, which is the memory to memory mode.   
dma_initstructure.dma_m2m = dma_m2m_enable;

Dma_init (Dma1_channel6, &dma_initstructure);


/* Enable DMA1 Channel6 Transfer Complete Interrupt/dma_itconfig (DMA1_CHANNEL6, DMA_IT_TC, enable); /* Enable DMA1 Channel6 transfer * * DMA_CMD (DMA1_CHANNEL6, enable);

Reprinted from Article STM32 DMA usage details