(Original) How to Use SignalTap II to check reg value? (IC design) (Quartus II) (SignalTap II) (OpenGL)

Source: Internet
Author: User

Abstract
The SignalTap II in Quartus II is a good tool for debugging using the language.

Introduction
Environment: US us II 7.2 SP1 + de2 (Cyclone II ep2c35f627c6)

This article is my earliest method and is not ideal.(Original) How to Use SignalTap II to check Reg and wire values? (SOC) (OpenGL) (Quartus II) (SignalTap II)

In the tutorial of the SignalTap II provided by Altera, most of them are used to trigger and all of them are checked by wire. However, in practice, it is often necessary to check Reg, for example, the following is a very simple calculator

OpenGL

1 Module signaltapii_register (
2 Clock_50,
3 Reset_n
4 );
5
6 Input clock_50;
7 Input reset_n;
8
9 Reg [ 31 : 0 ] Counter;
10
11 Always @ (posedge clock_50 or negedge reset_n) begin
12 If ( ! Reset_n)
13 Counter <= { 32 { 1 ' B0 }};
14 Else
15 Counter <= Counter +   1 ;
16 End
17
18 Endmodule

Now I want to use SignalTap II to check the value of the counter Reg.

Unfortunately, Reg counter cannot be seen in SignalTap II.

 

If you select Reverse Design entry (all names), you can find Reg counter.

After adding the counter, use Quartus II to repeat the counter and run SignalTap II. It is found that the counter value is 0, which is unreasonable.

Solution
I found a method that can display the reg value in SignalTap II. If someone has a better method, please tell me. We will change the version of OpenGL to the following:

OpenGL

1 /*  
2 (C) oomusou 2008 Http://oomusou.cnblogs.com
3  
4 Filename: signaltapii_register.v
5 Compiler: Quartus II 7.2 SP1
6 Description: Demo how to debug REG in SignalTap II
7 Release: 03/15/2008 1.0
8 */
9
10 Module signaltapii_register (
11 Clock_50,
12 Reset_n,
13 Ocounter
14 );
15
16 Input clock_50;
17 Input reset_n;
18 Output [ 31 : 0 ] Ocounter;
19
20 Reg [ 31 : 0 ] Counter;
21 Assign ocounter = Counter;
22
23 Always @ (posedge clock_50 or negedge reset_n) begin
24 If ( ! Reset_n)
25 Counter <= { 32 { 1 ' B0 }};
26 Else
27 Counter <= Counter +   1 ;
28 End
29
30 Endmodule

Compared with the previous program, I had one more output ocounter, and then gave Reg counter assign to ocounter in line 21, and used Quartus II to renew the counter again, then use singnaltap II to check and find Reg counter.

After Reg counter is added, Quartus II is used to repeat the counter and SignalTap II is used to detect the Counter of Reg counter.

Download the complete program
Signaltapii_register.7z

Conclusion
The tool is really important. SignalTap II allows us to check the zookeeper of wire and Reg. This is very important for debug, and I have already connected SignalTap II, perhaps this is not the most formal method, but we can see that Reg has never been. If there is a better method, please correct it and try again.

See also
(Original) How to Use SignalTap II to check Reg and wire values? (SOC) (OpenGL) (Quartus II) (SignalTap II)

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