Power supply Design Considerations

Power supply like the human circulatory system, is the energy input and output place, if the power supply design is unreasonable, or the energy output is insufficient, bring to the entire electronic system is deadly.

For linear power supplies, some concepts must be noted that the maximum power dissipation of PD = | Vin-vout | x Iout; Thermal resistance refers to the drag that heat is subjected to when it is transmitted outward from the device's wafer, and is ℃/w in the unit. Then the relationship between the thermal resistance and the maximum power pd is = (tj-ta)/PD, where TJ is the junction temperature and TA is the operating temperature.

According to the above formula, we calculate the commonly used chip AMS1117 nominal maximum can reach 1 A of the current output, see how much the actual can be achieved. (assuming 5V is stable to 3.3V)

First, the manual to find the thermal resistance and junction temperature, as shown in 1. where = 90℃/w, junction temperature TJ = 150 ℃, operating temperature Ta = 25 ℃, according to the above formula to obtain PD = 1.39W, then Iout = 1.39/(5-3.3) = 816.99mA, that is, the nominal maximum of 1 a AMS1117 normal work When the work can reach about 800mA, I often in the power chip maximum output current hit 80 percent, that is, the maximum output current of 1 A, in fact, is about 800mA.

Fig. 1 Thermal resistance of AMS1117

(1) power supply margin to sufficient

The power supply must be sufficient, generally more than 20% of the peak consumption of the load, so it is relatively safe, no unexpected failure.

When the power supply is low, the power supply will work in the extreme state, and the ripple of the power supply will rise sharply, reaching hundreds of MV or even a few volts. Therefore, it is best to estimate the maximum power dissipation above the entire board subsystem before determining the power input.

1) for an electronic system, carefully analyze the power requirements, including input voltage, output voltage and current, total power consumption, power supply efficiency, the power supply of the transient response to load transformation, the key device to the power supply fluctuation tolerance range and the corresponding allowable power ripple, as well as thermal problems and so on.

The evaluation is not only about full load, but also on the efficiency level of light load. CPU in the boot often requires a large current, if the power supply response speed is not enough, will cause an instantaneous voltage drop too much, resulting in a CPU error. 、

2) determine a reasonable power supply circuit implementation plan. For the weak part, basically the implementation of the scheme includes the Ldo and the DC-to Implementation scheme, the advantages of the Ldo is the output ripple is small, the disadvantage efficiency is not high, the calorific value is big, the supply current is not bigger than DCDC. The large ripple, which is the biggest drawback of the DC-DC and the Ldo, has the advantage of dealing with the Ldo's shortcomings.

Power Cabling also has some attention:

1) The power device and the interference source device should pay attention to the position and direction of placing, avoid interfering with other devices on the board;

2) The width of the line of the power device should be wider, so as to allow the large current to be left out;

3) The capacity of the decoupling capacitance should be sufficient, the position on the board should be reasonable;

4) The line of the power cord is not easy to be too long, the best way to avoid fork during the line, as far as possible from the source side outflow;

(2) Ripple problem should be noted

The ideal DC power supply output should be a pure DC, without the slightest clutter. However, in practice, there will always be internal resistance inside the power supply, when the load is supplied to the current changes with the load, the power supply will be reflected in the form of ripple noise. And some of the power supply itself will have output fluctuations, which is also ripple.

So what is ripple? Ripple is a small AC signal that is mixed in the DC. The pure DC voltage equals a constant C, the voltage with ripple is the output formula: V = C + sina/a + sinb/b + sinc/c + sind/d + ... C, after all, is actually a Fourier expansion of a ripple signal.

Effects of power Ripple:

1) in the video system, the image has stripes;

2) audio system, the speaker is mixed with other miscellaneous sound;

3) A/D conversion accuracy is not enough;

4) Failure of a module on the circuit board;

Some of the causes of power ripple:

1) Insufficient power supply capacity, resulting in increased ripple;

2) in the system, the high-speed clock signal and the data signal itself will produce noise, the reverse affect the power supply part;

3) PCB printed wiring and wiring is not appropriate, the impact of large power supply ripple;

4) digital IC, such as FPGA in high-speed operation with fast jump edge, instantaneous current also greatly changes, the generation of electromagnetic interference crosstalk affecting other components.

(3) It is imperative to suppress ripple waves

It has been described that the damage caused by the ripple is enormous, so it is necessary to reduce the ripple or the magnitude of the ripple. There are three ways to minimize signal path noise and ripple: very careful system PCB layout, proper power bypass, and correct power selection.

1) The Ldo can effectively reduce the magnitude of the ripple, when used, the input and output of the Ldo circuit need to be parallel to the capacitor, usually above 100uF. Large capacitors with lower internal resistance (ESR) can generally improve power supply rejection ratio (PSRR), noise, and transient performance. A 0.1uF ceramic capacitor is also used in parallel with a large capacitor to ensure high-frequency response of the power supply. The capacitance is positioned as close as possible to the input part of the power supply.

2) It is worth mentioning that in the signal back to the parasitic low-frequency oscillation, is generally the low-frequency power supply is too large, increase the capacity of the electrolytic capacitor, usually can be resolved; In the signal back to the high-frequency oscillation of the parasitic, generally the low-frequency power supply is too large, increasing the capacity of the electrolytic capacitor, usually can be

3) If the Ldo is powering the signal loop, the Ldo will not power the CPU and will affect the pure Ldo output.

Ceramic capacitor is the first choice of bypass high frequency, its fault mode is open circuit, tantalum capacitor fault mode is short circuit, responsible for the frequency ripple in the circuit. The ESR of the ceramic capacitor is low, probably at the 10mω level, the ESR of the tantalum capacitor is probably at the 100mω level, and the tantalum capacitor can easily achieve a magnitude of 10uF or more, and the tantalum capacitor is usually used more in DC. Electrolytic capacitors are responsible for attenuation of low-frequency ripple, because the frequency is low, so the position of the electrolytic capacitor is not very high, as long as the effect is similar.

(4) More knowledge

The reason for the large ripple of A/DC is that the chopping frequency is the cause, so when choosing the DC-to chip, we should choose the higher frequency, have the following advantages:

1) High frequency, high ripple frequency, easier to filter;

2) High frequency, can choose low inductance value, so that there will be more strong load capacity;

3) High frequency, can realize the ideal filter effect with small capacitance;

4) high frequency, self-loss current is also large;

If you want to minimize the DC or other discrete components of the power portion of the ripple, can be added to the input of the power supply RC filter circuit, can play a very good filter effect.

For the DC/DC also to say that the conversion efficiency and pressure of each of the DC chip is also related to the lower pressure differential, high conversion efficiency, such as 2 of the MP2359 conversion efficiency and pressure difference between the relationship. It also has the maximum conversion efficiency at some output current value. Therefore, the overall power consumption is estimated, and then the maximum power consumption of the system is selected in a DC/DC chip with the most efficiency of a current value.

Fig. 2 The relationship between efficiency and pressure difference

There will also be hot problems in the DC/DC, the equipment used to do power supply, usually small size, heat more difficult. Linear power supply heating and heat sinks are generally able to deal with the past. So in the project above the evaluation of a thing of the cooling speed of the indicator is called "Thermal resistance", which is defined as the reaction resistance heat transfer capacity of the comprehensive parameters, it can be seen that this parameter should be smaller the better. The unit is ℃/w, that is, the object continuous heat transfer power of 1W, heat conduction path at both ends of the temperature difference. Therefore, it is recommended to use an IC with a low thermal resistance for more than 400mA DC/DC circuits.

The higher the operating frequency of the chip, the higher the output current, for the following reasons:

1) The higher the switching frequency of a/DC chip, the smaller the ripple of the power supply, and the easier to control the ripple;

2) The external and DC to the general should be equipped with a storage of energy inductance, the general DC/D.C. operating frequency is higher, the size can be selected smaller, and inductance has a certain DC resistance, the larger the current, the higher the calorific value.

The higher the operating frequency of the DC/D.C. chip, the more likely it is to use the inductance of the small inductance, and the smaller the DC resistance, the smaller the calorific value. For scenarios with large current/DC, to minimize ripple, you can connect the GND of the device around a/DC to the shortest path to achieve a single point of co-location. Because these conductors have certain impedance and inductance, the single point can be used to eliminate the above effects. such as 3 is the author has designed the DC/DC circuit, the DC/DC peripheral device GND connected together, through the 0ω resistor R16 to achieve a single point of co-location.

Fig. 3 The Ripple circuit is reduced by DC

(5) Tolerance Ripple Range

In fact, there is no ripple of the power supply is not present, the above also talked about a lot of ways to reduce the ripple, ripple is must be reduced, most devices have a tolerance ripple range, as long as the device is tolerated within the ripple range is acceptable.

So for 5V power supply, the power ripple should be under 50mV, 3.3V power supply, the power input part of the ripple should be below 20mV.

Power supply Design Considerations