Power supply pins for FPGA

Source: Internet
Author: User

Ext.: http://www.cnblogs.com/Hello-Walker/archive/2012/08/23/2651987.html

The first is to see the FPGA in the configuration of the time there are three different electric vccint, VCCIO VCCA, so they looked at the following what is different:

FPGAs usually have a lot of pins, so what's the use of them?

The vccint is a voltage applied to the FPGA core logic, with a typical voltage of 1.2 V, 1.5 V, 1.8 V, 2.5 V, and 3V, with currents up to 12A (? )

Dedicated pins and user pins

FPGA pins fall into two categories: dedicated pins and user-defined Pins

The dedicated pin probably accounts for the 20%~30% of the FPGA pin count, which means that its hardware code is written for the purpose of implementing the dedicated function.

and the dedicated pin is divided into the following 3 sub-categories:

Power supply pin: grounded or anode pin (core or IO).

Configuration pin: Used to "Download" the FPGA.

Dedicated input or clock pins: they can drive large network cables inside the FPGA and are suitable for clocks and signals with large output ports (fanout).

The other pins are the user pins.

User Pin

Most of the pins on the FPGA are "user Pins" (such as the so-called "ios", or "I/Os", or "user I/Os", or "user IOs", or "io pins", or ... Self-understanding). IO stands for "input-output".

Attention:

Users can fully customize user Io. They can be programmed as input, output or bidirectional io (three-way buffering). Each "IO Pin" is connected to the IO unit inside the FPGA. This "IO unit" is power-up via the Vccio (IO power-on pin) pin.

IO cluster

Typically, each FPGA has a lot of Vccio pins (IO Power pins) that are added to the same voltage. But the new generation of FPGAs introduces the "User IO Group". The IO can be divided into different groups, each with its own voltage. This allows the FPGA to be used as a voltage transformer, for example, the Development Board part works in 3.3v, some of which work in 2.5v is very useful. (such as the Cyclone III series of the DDR2 to 1.8V of the voltage)

FPGA power supply

FPGAs typically require two voltages to operate: one is "core voltage" and the other is "IO voltage". Each voltage is supplied via a separate power supply pin.

The core voltage (hereinafter referred to as Vccint) is used to give the logic gate and the voltage on the trigger inside the FPGA. The voltage increases with the development of FPGA from 5v, 3.3v, 2.5v, 1.8v, 1.5v and lower. The core voltage is fixed. (determined based on the mode of the FPGA used). The IO voltage (Vccio) is the voltage on the IO module (the same IO pin) used for the FPGA. This voltage should match the voltage of other devices connected to the FPGA.

In fact, the FPGA device itself allows Vccint and Vccio to be the same (for example, Vccint and Vccio two pins can be connected together). But the FPGA design is for low-voltage cores and high-voltage IO, so the two voltages are generally not the same.

Named

The internal voltage Xilinx abbreviation Vcc,altera is referred to as Vccint;io voltage Xilinx abbreviation Vcco, and altera abbreviation Vccio.

Power supply pins for FPGA

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