Text/zookeeper Zhang. zhilong # gmail.com because a chip clock and enable signal in the project have very strict requirements on synchronization. Therefore, the PWM timer is used to solve the problem. Project parameters: f2812, clock speed 100 m, peripheral frequency 50 m. 1. The timer count starts from 0. So to calculate the number of 10, the cycle register should be set to 0x09, instead of 0x0a2. Timer 2 control register t2swt1 position 1. Note that the two timer control registers cannot be enabled to position 1 before the timer is started. Otherwise, data cannot be synchronized. 3. the PWM level change is determined by the value of the timer comparison register. For example, if the comparison register is set to 0x05, the value of the counter is increased to 5 (counting starts from 0, instead of the fifth. 4. Determine whether the selt1pr position of Timer 2 is used to determine whether the Timer 2 uses the timer 1 cycle or its own cycle. 5. Set the counting initial value and period. After controlling the register, enable the timer 1. At this time, the timer 2 is also started simultaneously. The related code is as follows:
Evaregs. t1pr = 0x0009; // timer1 period evaregs. t1cmip = 0x0005; // timer1 compare evaregs. t1cnt = 0x0000; // timer1 counter // initalize Eva timer2 evaregs. t2pr = 0xcd1d; // timer2 period evaregs. t2cmip = 0x000a; // timer2 compare evaregs. t2cnt = 0x0000; // timer2 counter evaregs. gptcona. bit. tcmpoe = 1; evaregs. gptcona. bit. t1pin = 1; evaregs. gptcona. bit. t2pin = 1; evaregs. t2con. all = 0x1082; // bit0 uses its own cycle bit7 -- uses the t1con enable bit to synchronize evaregs. t1con. all = 0x1002;
Evaregs. t1con. Bit. tenable = 1; // T1
If this function is enabled, synchronization is triggered. If this function is enabled in the previous step, synchronization fails.
