/proc/cpuinfo File AnalysisAccording to the following content, we can easily know the current system about the CPU, CPU, the CPU is enabled Hyper-threading and other information. <1> Query system has the number of
Logical Core: Cat/proc/cpuinfo | grep "
Processor" | Wc-l//
the ID of the logical processor(
number of logical cores)
<3>Query system
Number of CPUs: Cat/proc/cpuinfo | grep "
Physical ID" | Sort | Uniq | Wc-l//
ID of the processor in the physical package(
Number of CPUs) <2> Enquiry System
physical cores per CPU : Cat/proc/cpuinfo | grep "
CPU cores" | Uniq
// at
the same physical package The number of cores in the manager . (
physical number of cores per CPU )
core ID
//ID of each core ( the ID of the logical CPU)
Siblings//
number of logical processors in the same physical package of processors ( logical number of cores per CPU ) <4> querying the system CPU for Hyper-Threading: Cat/proc/cpuinfo | grep-e "CPU Cores"-e "siblings" | sort | UniqOutput Example: CPU Cores:6 siblings:6If the number of
CPUs cores and the number of siblings are the same, hyper-threading is not enabled, otherwise Hyper-threading is enabled.
To deepen our understanding of these parameters, let's look at another picture, which is a server for a workstation:
On this server, ' CPU cores ' for 4,physical ID has two, core ID has 8, siblings value is 8, a total of 16 processor.
So this server host CPU is 2 physically packaged processors, each processor has 4 processing cores (CPU cores), each CPU core can be divided into 2 logical processors (Hyper-Threading technology), so there are 8 logical processors on each physical processor, A total of 16 processor. This time you understand. The general structure is as follows:
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CPU information in the flags of the meaning:
Fpu:onboard (x87) floating point Unit
Vme:virtual Mode Extension
De:debugging Extensions
Pse:page Size Extensions
Tsc:time Stamp Counter:support for RDTSC and WRTSC instructions
Msr:model-specific Registers
Pae:physical Address extensions:ability to access 64GB of memory; Only 4GB can is accessed at a time though
Mce:machine Check Architecture
CX8:CMPXCHG8 instruction
Apic:onboard Advanced Programmable Interrupt Controller
Sep:sysenter/sysexit instructions; Sysenter is used for jumps to kernel memory during system calls, and Sysexit are used for Jumps:back to the user code
Mtrr:memory Type Range Registers
Pge:page Global Enable
Mca:machine Check Architecture
Cmov:cmov instruction
Pat:page Attribute Table
Pse36:36-bit Page Size extensions:allows to map 4 MB pages into the first 64GB RAM, used with PSE.
Pn:processor Serial-number; Only available on Pentium 3
Clflush:clflush instruction
Dtes:debug Trace Store
ACPI:ACPI via MSR
Mmx:multimedia Extension
Fxsr:fxsave and fxstor Instructions
sse:streaming SIMD Extensions. Single instruction multiple data. Lets you does a bunch of the same operation on different pieces of input:in a single clock tick. //gentoo CPU Setup parameters for system compilation and installation
sse2:streaming SIMD Extensions-2. More of the same. //gentoo CPU Setup parameters for system compilation and installation
SELFSNOOP:CPU self Snoop
Acc:automatic Clock Control
IA64:IA-64 processor Itanium.
Ht:hyperthreading. Introduces an imaginary second processor that doesn ' t does much but lets you run threads in the same process a bit quicker.
Nx:no Execute bit. Prevents arbitrary code running via buffer overflows.
Pni:prescott New Instructions aka. SSE3
Vmx:intel Vanderpool Hardware virtualization Technology //Determine if the Inter CPU supports virtualization
svm:amd "Pacifica" Hardware virtualization Technology //Determine if the Inter CPU supports virtualization
LM: "Long Mode," which means the chip supports the AMD64 instruction set
TM: "Thermal Monitor" Thermal throttling with IDLE instructions. Usually hardware controlled in response to CPU temperature.
TM2: "Thermal Monitor 2″decrease speed by reducing multipler and VCore.
EST: "Enhanced SpeedStep"
url:http://blog.csdn.net/sycflash/article/details/6643492url:http://blog.csdn.net/cuker919/article/details/ 7635488# Comments----------------------------------------------------------------------------------------------------------------- --------------------------------------------provides hardware and software information of proc file system display system in Linux system. If you want to know the provider of the CPU and related configuration information in the system, you can get it through the/proc/cpuinfo file. This article makes a brief summary of the file. Unlike the/proc/cpuinfo files generated by CPUs based on different instruction sets (ISA), the/proc/cpuinfo file based on the X86 instruction set CPU contains the following:
processor:0
Vendor_id:genuineintel
CPU Family:6
Model:26
Model Name:intel (R) Xeon (r) CPU E5520 @ 2.27GHz
Stepping:5
CPU mhz:1600.000
Cache size:8192 KB
Physical id:0
Siblings:8
Core id:0
CPU Cores:4
apicid:0
Fpu:yes
Fpu_exception:yes
CPUID level:11
Wp:yes
FLAGS:FPU VME de PSE TSC MSR PAE MCE cx8 APIC Sep MTRR PGE MCA cmov Pat PSE36 clflush DTS ACPI MMX FXSR SSE SSE2 SS HT TM Syscall NX rdtscp LM CONSTANT_TSC Ida NONSTOP_TSC PNI monitor ds_cpl vmx est tm2 cx16 xtpr popcnt lahf_lm
bogomips:4522.12
Clflush size:64
Cache_alignment:64
Address sizes:40 bits physical, bits virtual
Power Management:
The above output items have the following meanings:
Processor: The number of the logical processing cores in the system. For a single-core processor, the class is considered its CPU number, and for multicore processors it can be a physical core, or a virtual logical core using Hyper-Threading Technology
VENDOR_ID:CPU Manufacturers
CPU FAMILY:CPU Product Family Code
Model:cpu belongs to which generation in its series
Model NAME:CPU belongs to the name and its number, the nominal frequency
Stepping:cpu belongs to the production update version
CPU MHZ:CPU The actual use of the main frequency
Cache Size:cpu Level Two buffer size
Physical ID: The label of a single CPU
Siblings: Number of logical physical cores for a single CPU
Core ID: The number of the current physical core in which the CPU is located, which is not necessarily sequential
CPU Cores: The physical core number of the CPU at which the logical core is located
Apicid: Used to distinguish the number of different logical cores, this number of each logical core in the system must be different, this number is not necessarily continuous
FPU: Whether it has a floating point unit (floating)
Fpu_exception: Whether floating point calculation exceptions are supported
CPUID level: The value in the EAX register before the CPUID instruction is executed, depending on the value of the CPUID instruction will return different content
WP: Indicates whether the current CPU supports write protection of user space in kernel state (write Protection)
Flags: Features currently supported by the CPU
Bogomips: Approximate CPU speed at boot of system kernel (Million instructions Per Second)
Clflush size: per-flush cache
Cache_alignment: Cache Address Alignment Units
Address sizes: Number of accessible addresses space
Power Management: Support for energy management with the following optional support features:
Ts:temperature sensor
Fid:frequency ID Control
Vid:voltage ID Control
Ttp:thermal Trip
Tm:
Stc:
100mhzsteps:
Hwpstate:
/proc/cpuinfo file Analysis (view CPU information)