Protection Mode: A20 Switch

Source: Internet
Author: User

The 20th IP address lines of the PC and Its compatible hosts are special. in computer systems, a "door" is usually arranged to control whether the IP address line is valid. To access a storage unit larger than 1 MB, open the A20 portal ". This setting is related to the use of only the low-end 1 Mbit/s bucket in real mode. It is related to whether the processor is working in real mode or the protection mode. That is, you can turn off A20 and enter the protection mode. ---- 80x86 Assembly LanguageProgramDesign

(1) In real mode

In real mode, the A20 is related to accessing high-end memory (100000h-10ffefh, which is a bug). At 8086, there are 20 address lines, so you can access 2 ^ 20 = 1 m, however, since the addressing mode is a 16-bit address mode, the address range that can be expressed is 0-64 K. to access the 1 m address, the segment mode is available: the 16-bit base address shifts 4-bit to the left + 16-bit offset = 20-bit address.

(2) In protection mode

A20 From its name, we can see that, in fact, it is 20-bit (From 0 Starting number) special processing ( That is 21 Root address Line Processing ) . If A20 Gate Forbidden. 80286 The address is 24bit The address is Efffff For 80386 Extremely subsequent 32-bit For the chip, its address is expressed Ffefffff . This indicates that if A20 Gate If it is disabled 20-bit In CPU The address access is invalid and can always be used 0 If A20 Gate Is opened, 20-bit Is valid, and its value can be either 0 And can be 1 .

Therefore, in protection mode, ifA20 GateDisabled, the accessible memory can only be an odd number1 mSegment, that is1 m, 3 M, 5 m..., That is00000-fffff, 200000-2fffff, 300000-3fffff.... IfA20 GateIs enabled, the memory that can be accessed is continuous.

(3) A20 Switch

(1) i8042 operations
The output port of the keyboard controller has a number of functions.
Bit 0 is used to reset the CPU (go to real mode)-a reset happens when bit 0 is 0.
Bit 1Is used to control A20-it is enabled when bit 1 is 1, disabled when bit 1 is 0.
This method is to set 2nd-bit for the output port of the 8042 chip. However, when you output the port to 8042, other data may need to be processed in the keyboard buffer, therefore, you must first process other data:

1.Interruption prohibited;

2.Wait8042 input bufferIt is empty;

3.Send the prohibit keyboard operation command8042 input buffer;

4.Wait8042 input bufferIt is empty;

5.Send read8042 output portCommand;

6.Wait8042 output bufferData available;

7.Read8042 output bufferAnd save the obtained bytes;

8.Wait8042 input bufferIt is empty;

9.SendWrite 8042 output portCommand8042 input buffer;

10.Wait8042 input bufferIt is empty;

11.SetSlave8042 output portThe number of bytes2Location1(Or 2), And then write8042 input buffer;

12.Wait8042 input bufferIt is empty;

13.Send the allowed keyboard operation command8042 input buffer;

14.Open the interrupt.

ReferenceCode:

A20enable:
CLI; 1. Disable interruption
Call waitinbufempty; 2. Wait for 8042 input buffer to be empty;
MoV Al, 0adh; send command ADH to 64 h port (disable keyboard interface. Bit-4 of command byte is set. When this command is published, keyboard will be banned from sending data to output register .)
MoV dx, 64 h
Out dx, Al; 3. Send a command to prohibit keyboard operations
Call waitinbufempty; 4. Wait for 8042 input buffer to be empty;
MoV Al, 0d0h
MoV dx, 64 h
Out dx, Al; 5. Send the 8042 output PORT command;
Call waitoutbuffull; 6. Wait for 8042 output buffer to have data;
MoV dx, 60 h
In Al, DX; 7. Read 8042 output buffer
Push ax; save read data
Call waitinbufempty; 8. Wait 8042 the input buffer is empty;
MoV Al, 0d1h
MoV dx, 64 h
Out dx, Al; 9. Send and write the 8042 output PORT command
Call waitinbufempty; 10. Wait 8042 the input buffer is empty.
Pop ax
Or Al, 02 h; 11. Set bit 1 of the byte obtained from the 8042 output port to 1.
MoV dx, 60 h
Out dx, Al; write output port
Call waitinbufempty; 12. Wait for the 8042 input buffer to be empty.
MoV Al, 0aeh
MoV dx, 64 h
Out dx, Al; 13. send commands that allow keyboard operations
STI; interrupt
RET

waitinbufempty:
mov dx, 64 h
in Al, DX; read status register
test Al, 02 h; test whether 2bit is, indicating that there is data in the buffer
jnz waitinbufempty; ZF = 0, the calculation result is not 0, that is, the logic is 1
RET

Waitoutbuffull:
MoV dx, 64 h
In Al, DX
Test Al, 01; read Status Register
JZ waitoutbuffull
RET

(2) Operating System control port a is the most common.
MCA, EISA and other systems can also control A20 via port 0x92.
BITs, 7 seem to have the same meaning everywhere this port is implemented.
Bit 0 (W): Writing 1 to this bit causes a fast reset (used to switch back to real mode; for MCA this took 13.4 MS ).
Bit 1 (RW): 0: Disable A20, 1: Enable a20.
Bit 3 (RW ?) : 0/1: power-on password bytes (stored in CMOS bytes 0x38-0x3f or 0x36-0x3f) accessible/inaccessible. This bit can be written to only when it is 0.
Bits 6-7 (RW): 00: Hard Disk activity led off, 01,10, 11: Hard Disk activity led on.
Bits 2, 4, 5 are unused or have varying meanings. (on MCA bit 4 (R): 1: watchdog timeout occurred .)
Reference code:

Enablea20 proc
; Open A20
PUSH AX
In Al, 92 h; read A20 status
Or Al, 2; Set 2bit to 1
Out 92 h, Al; send the status result to port 92 h
Pop ax
RET
Enablea20 endp
;
Disablea20 proc
; Closed A20
PUSH AX
In Al, 92 h
And Al, 0fdh; 0fdh = Not 20 h
Pop ax
RET
Disablea20 endp

3. BIOS int 0x15 ax: 2400
This is a detailed description in the interrupt list of the CMU computer system column Ralf brown taidou-"int 15 2400-system-later PS/2 s-Disable A20 Gate"
Reference code:

Entry: Ah = 24 h
Al = 0 disable A20
1 open A20
2 read A20 status
Int 15 h

Return: If the BiOS supports this function, cf = 0; otherwise, cf = 1
When cf = 0, ax returns the current A20 status, 1 = open, 0 = close

(4) Ami BIOS (not common)
Bit 7 = 1: weitek math coprocessor present
Bit 6 = 1: floppy drive seek at boot disabled
Bit 5 = 1: system boot sequence A:, C: (otherwise C:, :)
Bit 4 = 1: System Boot CPU speed high
Bit 3 = 1: external cache Enabled
Bit 2 = 1: Internal cache Enabled
Bit 1= 1: fastGate A20Operation Enabled
Bit 0 = 1: Turbo switch function enabled

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