Proteus 7.10 supports arm Cortex-M3/lm3s *

Latest features:

Proteus VSM for ARM Cortex-M3/lm3s *-simulation support for this popular microcontroller Family

Arm Cortex-M3/lm3s * library module:

Library: stellaris. Lib

Models: cm3.dll, cm3_lm.dll, stellaris. lml

Available in proteus 7.7 or 7.8, add a line to itfmod. MDF:

CM3    : RSHI=20, RSLO=20,RWHI=100k,VUD=2,VTL=0.8,VHL=0.2,VTH=2.5,VHH=0.2,V+=VDD,V-=GND,TRISE=1n,TFALL=1n

You can find the microprocessor device name:

Lm3s300, lm3s301, lm3s308, lm3s310, lm3s315, lm3s316, lm3s317, lm3s328.

Test code (light up led ):

; ---- ==---- Arm Cortex-M3/lm3s * led assembly test (TUMB-2 Instruction Set); ---- ===---- by G-spider @ 2012 area armcm3led, code, readonlysysctl equ 0x400fe000; basercgc2 equ 0x108; offsetgpiod equ 0x40007000; baseafsel equ 0x420; offsetdir equ 0x400; offsetdata equ 0x000; offset entrystart; Enabled; Enable gpioa, gpiob, gpioc, gpiod, gpioe clocking for changing pin functions LDR r0, = (sysctl + rcgc2) mov R1, # 0x1f STR R1, [R0]; sysctl-> rcgc2 | = 0x0000001f; ------------------------------; All pins are gpio LDR R2, = (gpiod + afsel) mov r0, #0 STR r0, [R2]; gpiod-> afsel = 0x00; then ;--------------------------------; pin.0 is output LDR R1, = (gpiod + DIR) mov r0, #1 StR r0, [R1]; gpiod-> dir = 0x01; ------------------------------ LDR R2, = (gpiod + Data) mov r0, #0 STR r0, [R2]; gpiod-> DATA = 0; ---------------------------------- loop mov r0, #1 StR r0, [R2]; gpiod-> DATA = 1 B loop end

Compile:

@echo offset path=D:\Keil\ARM\BIN40;%path%set FILE=testarmasm.exe  --cpu=Cortex-M3 -g -o %FILE%.o %FILE%.sarmlink.exe  -o %FILE%.axf  %FILE%.o fromelf.exe --i32 --base 0x00 -o %FILE%.hex %FILE%.axffromelf.exe -v -a -c -d -e -g -r -s -t -y -z  -o %FILE%.lst %FILE%.axfpause

 

The effect is the same as the following (if you cannot complete the video, save it as a file, you can see it all ):