(i) the foregoing
The two basic questions that the title says are:
Where is the data being processed? ?
How long is the data to be processed ? ?
These two problems, in the machine instructions must be given explicit or implicit instructions, otherwise the computer will not work.
We define descriptive symbols: Reg and Sreg.
Reg represents a register that represents a segment register with Sreg.
The collection of Reg includes:ax, BX, CX, DX, ah, AL, BH, BL, CH, cl, DH, DL, SP, BP, Si, di;
The Sreg collection includes:DS, SS, CS, es.
(b) BX, Si, Di and bp
In 8086CPU, only these 4 registers can be used in the "[...]" To address the memory unit. The following instructions are correct:
MOV AX,[BX]
MOV Ax,[bx+si]
MOV Ax,[bx+di]
MOV AX,[BP]
MOV Ax,[bp+si]
MOV Ax,[bp+di]
The following instruction is incorrect:
MOV Ax,[cx]
MOV Ax,[ax]
MOV AX,[DX]
MOV Ax,[ds]
In the [...] , these 4 registers can appear either individually or only in 4 combinations: bx and Si, bx and di, BP and Si, BP and di.
The following instruction is incorrect:
MOV AX,[BX+BP]
MOV Ax,[si+di]
As long as the [...] The register is used in BP, and the instruction does not explicitly give the segment address, the segment address is the default in SS, as follows:
MOV AX,[BP]
MOV Ax,[bp+idata]
MOV Ax,[bp+si]
MOV Ax,[bp+si+idata]
(iii) Where the data processed by the machine instruction is
The data processed can be in 3 places: CPU internal, memory, port.
(iv) Expression of data position in assembly language
3 concepts can be used to express the location of the data
Immediate COUNT (idata)
MOV ax,1
Add bx,2000h
or bx,00010000b
mov al, ' a '
Register: Instruction to process the data in the Register
MOV ax,bx
MOV Ds,ax
Push BX
MOV ds:[0],bx
Push DS
MOV Ss,ax
MOV Sp,ax
Segment address and offset address
The register that holds the segment address can be the default, as follows:
MOV ax,[0]
MOV Ax,[di]
MOV Ax,[bx+8]
MOV Ax,[bx+si]
MOV Ax,[bx+si+8]
And so on, the segment address is in DS by default;
MOV AX,[BP]
MOV Ax,[bp+8]
MOV Ax,[bp+si]
MOV Ax,[bp+si+8]
And so on, the segment address is in the SS by default. The register that holds the address of the segment can also be given explicitly, as follows:
MOV AX,DS:[BP]
MOV AX,ES:[BX]
MOV Ax,ss:[bx+si]
MOV Ax,cs:[bx+si+8]
(v) How long does the instruction have to process the data?
8086CPU instruction that can handle two sizes of data, byte and Word. So in the machine instructions to indicate whether the instruction is a word operation or a byte operation.
-
Indicates the size of the data to be processed by the register name
Below indicates the word operation
mov ax,1
mov bx,ds:[0]
mov ds,ax
mov ds:[0],ax
Inc AX
Add ax,1000
In the following instruction, the register indicates that the instruction is a byte operation
mov al,1
mov al,bl
mov al,ds:[0]
mov ds:[0],al
Inc Al
Add al,100
In the case where there is no register name, the length of the memory unit is indicated by the operator x PTR, and x can be word or byte in the assembly instruction.
The following instruction uses word ptr to indicate that the memory unit accessed by the instruction is a word unit
mov word ptr ds:[0],1
Inc Word PTR [bx]
Inc Word ptr ds:[0]
Add word ptr [bx],2
In the following instruction, the memory unit that the instruction accesses is indicated by a byte ptr as a byte unit
mov byte ptr ds:[0],1
Inc byte PTR [BX]
Inc byte ptr ds:[0]
Add byte ptr [bx],2
Some directives default to whether a word cell or a byte cell is accessed, for example, push [1000H] does not indicate whether to access a word cell or a byte cell, because the push instruction only carries out word manipulation .
(vi) DIV instruction
The DIV is the division instruction, and the following questions are required to use this directive:
Divisor: There are 8-bit and 16-bit, in a reg or memory unit
Divisor: By default in ax or DX and ax , if the divisor is 8 bits, the divisor is 16 bits, by default in Microsoft Dynamics AX, if the divisor is 16 bits, the divisor is 32 bits, stored in DX and ax,DX holds 16 bits high, AX holds 16 bits lower .
Result: If the divisor is 8 bits, then Al stores the quotient of the division operation, AH stores the remainder of the division operation, and if the divisor is 16 bits, then ax stores the remainder of the division operation for the quotient, DX storage division operation.
The format is as follows:
DIV Reg
div Memory Unit
div byte ptr ds:[0]
Meaning: (AL) = (AX)/((DS) *16+0)
(AH) = remainder of (AX)/((DS) *16+0)
div word ptr es:[0]
Meaning: (ax) =[(DX) *10000h+ (AX)]/((es) *16+0)
remainder of (DX) =[(DX) *10000h+ (AX)]/((es) *16+0)
(vii) pseudo-directive DD
Before we define byte data and font data in DB and DW, DD is used to define DWORD (double word) type data, for example:
Data segment
DB 1
DW 1
DD 1
Data ends
3 data is defined in section
The first data is 01H, at data:0, accounting for 1 bytes;
The second data is 0001H, at Data:1 Place, point 1 words;
The third data is 00000001H, at the Data:3 Place, accounting for 2 words;
(eight) DUP command
A DUP is an operator that is the symbol that the compiler recognizes to handle data duplication, such as:
DB 3 dup (0)
3 bytes are defined, and their values are 0, which is equivalent to DB 0,0,0.
DB 3 dup (0,1,2)
9 bytes are defined, they are 0, 1, 2, 0, 1, 2, 0, 1, 2, which is equivalent to DB 0,1,2,0,1,2,0,1,2.
As can be seen, the use of DUP is as follows:
Number of times the DB repeats DUP (repeated byte-type data)
Number of times the DW repeats DUP (duplicate font data)
DD repeats the number of times DUP (duplicate double-glyph data)
Stack segment
DW 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
DW 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
DW 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
DW 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
Stack ends
Equivalent to the following:
Stack segment
DB DUP (0)
Stack ends
Summary complete!
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"Assembly language" summarizes two basic problems of 05--data processing