"Operating System" paging storage Management method

Discrete distribution Method

Issues arising from continuous allocation of storage management: requiring continuous storage fragmentation issues

Variable succession is assigned as a discrete assignment, allowing the job to be dispersed across multiple disjoint partitions. Paging Storage Management: The basic unit of discrete allocation is page segmented storage management: The basic unit of discrete allocation is segment page Storage management: The basic unit of discrete distribution is segment, page page and physical block

Spatial partitioning divides the address space (logical space) of a user process into several areas of equal size, called pages or pages, numbered from 0 onwards. The memory space is also divided into areas that are equal to the page size, called blocks (physical blocks) or page frames (frame), which are also numbered starting with 0.

Memory allocation in blocks when allocating memory for a process, several pages in a process are loaded into multiple nonadjacent blocks, and the last page is often filled with fragments that appear to be fragmented within the page. Address Structure

Known logical Address page number and in-page address

Given a logical address space where the address is a and the page size is L, the page number P and the in-page address D (numbering starting from 0) can be evaluated as follows:

Where INT is the divisible function, the mod is the remainder function.

Example: The system has a page size of 1 KB and A = 2170 B, then P = 2,d = 122 can be obtained by the above formula. Page Table

To make it easier for each page of a process to be found in memory, a page table is configured for each process in the paging system, and each page in the process logical address space should have a page table entry in the page table.

The page table is stored in memory and belongs to the field information of the process.
Usage: 1. Log the memory allocation of the Process 2. Enables dynamic relocation of the process while it is running.
Access to one data requires access to memory 2 times (page table once, memory once).
The base and length of the page table is given by the page table register.

Page Size

A smaller page reduces fragmentation and total memory fragmentation in the pages, helping to improve memory utilization. The number of pages per process increases, increasing the page table length and consuming large memory. Page swap-out speed will be reduced.

If the page size per process is reduced, the page table length is reduced and memory consumption is small. Page swap-out speed will increase. Increasing in-page fragmentation is not conducive to increased memory utilization. Basic Paging Storage Management method

In the way of paging storage management, if you do not have the page swapping function, the virtual memory function is not supported, this kind of storage management is called pure paging or basic paging storage management mode.

When a dispatch job runs, all its pages must be paged into memory at a time, but the memory blocks for each page that are logically contiguous can be disjoint.

Special fixed partition + discrete assignment address transformation mechanism

The address transformation mechanism transforms the logical address in the user address space into a physical address in the memory space. The conversion of the logical address to the Physical Address (page number ⇒ block number) address transformation is done with the help of a page table.

Address transformation mechanism The basic address transformation mechanism with a fast table address transformation mechanism Basic Location Transformation mechanism

The address transformation is done with a page table, and the page table resides in memory.

To increase the speed of the address transformation, a page table register PTR (page-table register) is set up in the system.

Each process corresponds to a page table whose information (such as length, initial address) is placed on the PCB and loaded into the page table register when executed.

In a single processor environment, although multiple processes can be run in the system, only one page table register is required. Basic Address transformation mechanism

When the process wants to access data in a logical address, the paging address transformation mechanism automatically divides the valid address (relative address) into the page number and the in-page address two parts.

Comparing the page number to the page table length, if the page number is greater than or equal to the page table length, indicates that the address accessed by this time has exceeded the address space of the process, resulting in an address out-of-bounds interrupt.

The Product of page table start-up and Page number and page table item length is added to get the table item position in the page table, so the physical block number of the page can be obtained and loaded into the physical address register.

The in-page address in the valid address register is fed into the in-block address field of the Physical address register.

Logical address: The relative address is divided into page number and in-page address two parts. Out-of-bounds interrupts: page numbers are compared to page table lengths. Page Table positioning: Page table start + page number x page table item length. {Query Page table: read out block number. Physical Address: Block number + in-block address. (Intra-block address = page Mainland site)

Address Transformation Example

Example: In a paging storage management system, the page table of a job is shown in the table below, the known page size is 1024B, try to convert the decimal logical address 1011,2148,5012 to the corresponding physical address.

The page number is P, the offset in the page is W, the logical address is a, the memory address is M, the page size is L, then
P = Int (a/l)
W = A MoD L
For logical address 1011
P=int (1011/1024) =0
w=1011 MoD 1024=1011
A=1011= (0,1011)
Page No. 0 on page 2nd, so the physical address is m=1024*2+1011= 3059.

For a logical address of 2148
p= Int (2148/1024) =2
w=2148 MoD 1024=100
a=2148= (2,100)
Page 2nd in 1th block, so physically
The site is m=1024*1+100=1124.
For logical address 5012
p= Int (5012/1024) =4
w=5012 MoD 1024=916
The page number exceeds the page table length, and the logical address is illegal.

Example: Memory of the user space total 32 pages, 1KB per page, memory 16KB. It is assumed that at some point the system assigns the physical block number 5, 10, 4, 7 to the user's No. 0, 1, 2, and 3 pages, and tries to transform the logical address 0a5c and 093C to the physical address.

an address transformation mechanism with a fast table

The problem of basic address transformation mechanism is low (two accesses memory)

Address transformation mechanism with a fast table objective: To improve the speed of address transformation. Fast table: Also known as Lenovo Register, Lenovo Memory (Associativememory), ibm-tlb (translation lookaside Buffer). A fast table is a special caching cache that is part or all of the contents of a page table. The CPU generates the page number of the logical address, first in the fast table, if the hit to find its corresponding physical block, if not hit, then to the page table to find its corresponding physical block, and copy it to the fast table. If the contents of the fast table are full, some pages are retired by an algorithm.

effective time to access memory

Valid access times (effective access time, EAT) are the total amount of time taken from a given logical address, through address transformations, to finding the corresponding physical address unit in memory and extracting the data.

Basic address transformation mechanism

An address transformation mechanism with a fast table

Example: There is a one-page system whose page tables are stored in memory. (1) If the memory of a single access to 100ns, how to achieve a page access time is how much. (2) If there is a fast table, one access to the fast table needs 20ns, the average hit rate is 85%, ask how much access time at this point.

Page table in memory, it takes 2 accesses of memory to implement one page access.
So the access time to achieve one page access is: 100ns*2=200ns

The system has a fast table, then the access time to achieve one page access is:
0.85* (20ns+100ns) + (1-0.85) * (20ns+2*100ns) =135ns Multilevel page table

If the logical address space is large (2^32∼2^64), then the number of pages divided, the page table is very large, occupy large storage space (requires continuous), the implementation is more difficult.

For example, for a paging system with a 32-bit logical address space, if the specified page size is 4 KB or 2^12 B, then the page table for each process consists of up to 2^20 pages. Set each page table entry to occupy one byte, and each process will occupy 1 MB of memory space for the page table alone.

Solution to the problem dynamic paging into the page table: only the current required portion of the page table entries into memory, the rest need to be transferred into. Multilevel Page table level two page table

The page table is paginated, the page table pages are separated into different physical blocks, and an external page table is created to record the physical block number corresponding to the page table page.

Running processes, the external page table must be paged into memory and dynamically paged into the internal page table. Only some of the currently required internal page tables are loaded into memory, and the remainder will be transferred as needed.

The outer page table is paginated, and the pages of each sheet are separated into different physical blocks, and the corresponding relationships between them are recorded using the 2nd level of the Outer page table.

Reverse Page Table

Method of solving the problem Dynamic paging Page Table Reverse page table (Inverted page tables)

The table entries for the General page table are sorted by page number, and the contents of the page table entry are the physical block numbers.

The Reverse page table is a page table entry that is set for each physical block and sorted by physical block number, where the page number P and the subordinate process identifier PID are included.

Use the Reverse page table for address transformation to retrieve the reverse page table using the Process marker and page number. If the page table entry is not found for the entire page table, it indicates that the page has not been paged into memory at this time, and that a request paging interrupt is generated for the memory system with the request paging function, which means that there is an error in the address if this function is not available. If a matching table entry is retrieved, the sequence number I of the table item is the physical block number of the page, along with the in-page address to form the physical address.

The Reverse page table can effectively reduce the memory consumed by the page table, but the inverted page table contains only the pages that have been paged into memory, not the pages of the individual processes that are not in memory, so you must create an external page table (External page tables) for each process. The external page table is not accessed until the page is found to be in memory. The external page table holds the physical location of each page in the external memory. The external page table allows you to push the desired page into memory. In the Reverse page table, a page table entry is set for each physical block, usually the number of page table entries is also large, and is usually retrieved using a Hash table. sharing and protection of pages

Page sharing: Each process points the corresponding page of the data/program that needs to be shared to the same physical block.

Protection of pages

The page storage Management system provides two ways: address cross-border protection set the protection bit in the page table (define Operation permissions: Read-only, read-write, execute, etc.)

Problems with sharing

If shared data is in the same piece as unshared data, some data that is not shared is shared and is not easy to keep secret. It is more difficult to calculate the intra-page displacement of shared data.

The best way to achieve data sharing: segmented storage management.