Read "cortexm3" authoritative guide note (2)-interrupt specific behavior and Storage System

Source: Internet
Author: User

1,Interrupt exception response

When cm3 starts to respond to an interruption, three dark streams will surge in its invisible body:
Stack entry: Push the values of the eight registers into the stack: the first action to respond to exceptions is to automatically save the necessary part of the site: In turn, xpsr, PC, LR, r12 and r3‐r0 are automatically pushed into the appropriate stack by the hardware: if the current code is using PSP when an exception is returned, it is pushed to PSP, that is, the thread stack; otherwise, it is pushed to MSP, use the master stack. Once a service routine is entered, the master stack will be used all the time.
Oriented volume: Find the corresponding endpoint address of the service program from the vector table: when the data bus (System Bus) is busy for the stack operation, the command bus (I-code Bus) is not cool-sitting and watching busy-it is executing another important task in a tight and orderly manner in response to interruptions: finding the correct exception vector from the vector table, then prefetch at the entrance of the service program. The inbound and outbound operations can be performed simultaneously.
Select the stack pointer MSP/PSP, update the stack pointer sp, update the connection register LR, and update the program counter PC.

2. Abnormal Return

After an exception service routine is executed, a sequence of "exception return" actions must be formally performed to restore the previous system status so that the interrupted program can continue to be executed. There are three ways to trigger exceptions.
Return sequence, as shown in the table. The previously stored LR value is used no matter which type is used.

Bit band operation of memory

The bitband is supported, and the bitband is implemented in two zones. One of them is the minimum 1 MB range of the SRAM zone, and the second is the minimum 1 MB range of the internal and external zones. In addition to normal ram, the addresses in these two zones also have their own "bit with alias ", the bitwise with alias area expands each bit into a 32-bit word. When you access these words through a bit with an alias, you can access the original bit.

The range of the two memory zones that support bitband operations is:
0x2000_0000-0x200f_ffff (in the SRAM Area
0x4000_0000-0x400f_ffff (minimum 1 MB in the On-Chip external area)

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