Reduced Instruction sets; CISC, Complex Instruction Sets

Reduced Instruction sets; CISC, Complex Instruction Sets
The CPU of the period is all in the CISC architecture. It is designed to complete the required computing tasks with the least number of machine language commands. For example, for multiplication, on the cpu Of the CISC architecture, you may need such a command: Mul addra, addrb can multiply the numbers in addra and addrb and store the results in addra. The operations of reading data from addra and addrb into registers, multiplication, and writing results back to memory all depend on the logic designed by the CPU. This architecture will increase the complexity of the CPU Structure and the requirements for the CPU process, but it is very beneficial for Compiler development. For example, in the above example, A * = B in the C program can be directly compiled as a multiplication command. Today, only intel and its compatible CPU are still using the CISC architecture.

The Proteus architecture requires the software to specify each operation step. In the above example, if we want to implement it in the RISC architecture, read the data in addra and addrb into the Register, and multiply and write the result back to the memory, which must be implemented by the software, such as mov, addra; MoV B, addrb; Mul a, B; STR addra,. This architecture can reduce CPU complexity and allow more powerful CPUs to be generated at the same process level, but it has higher requirements for compiler design.

In the early computer industry, compiler technology has not yet emerged. Programs are completed in machine or assembly languages. To facilitate programming, computer architects design increasingly complex commands that can directly correspond to advanced functions in advanced programming languages. At that time, the idea was that hardware was easier to design than compilers, so the complexity of the structure lies in the hardware.
Another factor is that at that time, the memory capacity was not only small, but also the speed was very slow. magnetic technology was used. With high-density packaging commands, the frequency of accessing slow resources can be reduced.

There are only a few registers in the microprocessor for two reasons:

Each bit in the register is more expensive than the external memory. At the current level of integrated circuit technology, a large number of registers are hard to bear for the chip or circuit board.
Once there are a large number of registers, the related commands (opcode) will require more bits (using valuable RAM) to locate the registers.

Up to now, there has been no strict definition of the Proteus architecture. It is generally believed that the following features should be taken into account:
-The fixed-length Instruction format is used. There are two methods for command normalization, simple, and basic addressing ~ Three types.
-Use single-cycle commands to facilitate pipeline operations.
-A large number of registers are used. Data Processing commands only operate on registers, and only loading/storing commands can access the memory,
To improve the efficiency of instruction execution.

In fact, both of them have their own advantages, and the boundaries are not that obvious. Modern CPUs often use the peripheral CISC and include the characteristics of the CPU. For example, the super-long instruction set CPU integrates the advantages of the CPU and CISC and will become one of the future CPU development directions.

Summary
Some of the commands can be completed in one machine cycle, and the processor can execute a series of commands at the same time. The number of registers is increased by the number of registers. More memory is needed for the server.