Reflections on a pull-up resistor (I.)

We often see a pull-up resistor in the write driver process, sometimes listening to hardware engineers saying that pull-up is not enough, or that the pull is too small. I have not studied the role of it before, just know that can play a stable level, improve the role of driving capacity. Generally used for OC (open colector) gate, OD Gate (open Drain, open drain, one of which is an i²c bus) or a circuit with insufficient output drive capability. Recently I went online to search the relevant knowledge, to view the previous college courseware, found that the previous foundation is really important AH. In fact, this knowledge has been learned before, but why the feeling of learning not to go deep, soon forget it. This one has aroused my thinking, this is, we study in the school, generally just to learn and to learn, and no specific purpose. For example, if you want to do a project, these projects require some knowledge. We learn a lot of knowledge, but do not get the application, in the near future will forget, this kind of learning is not to do in-depth. The right way to learn is the practice of theory----... Continuous circulation. Now I look back at some of the theoretical knowledge of the circuit, there is a sense of a sudden, oh, it is like this.

Well, it's not far. Let me explain the principle and application of the pull-up resistance of OC Gate. Students majoring in electronics should feel that these are very simple, but the computer class may be the same as me, is indefinitely. If this is the case, you may be able to understand it after you finish reading this article. This article may also have a lot of errors and omissions in the place, please correct them.

The picture above is a OC door, it is actually a and non-gate. A, B is the input, F is the output end. Where RL is not part of the OC Gate, it is the output of a pull-up resistor, received on VCC. As long as the supply voltage and load resistance are properly selected, the output level F is guaranteed to be high and low, and the output tube (T5) Current is effectively prevented from being too large.

For OC doors, we can understand it a little easier. The OC door as a black box, when the input is low, OC Gate cutoff (T5 tube cutoff, equivalent to open collector), F-terminal output high, at this time can be regarded as only VCC,RL and external load connected. When the input terminal is high, the OC gate is saturated, and at the output there will be a fixed saturation current (the saturation current of the T5 tube collector) flowing into the OC Gate, the F-terminal output low level.

When there is a m OC door directly parallel, and with N and non-gate load, as long as the public external load resistor RL Select appropriate, you can ensure that the output high level is not less than the specified vohmin value, but also to ensure that the output low level is not higher than the specified volmax. It also does not form a low resistance path between the power supply and the ground.

Selection of the collector load resistor RL:

Output f outputs a high level condition.

If the output of M-OC and non-gate is parallel to the high level, the line and result are high, as shown in the following figure below.

At this point you must meet:

Vcc-irlrl≥vohmin

vcc-(MIOH+PIIH) rl≥vohmin

Rl≤ (vcc-vohmin)/(MIOH+PIIH)

That is, the maximum value of RL is (vcc-vohmin)/(MIOH+PIIH), and generally speaking, vcc,vohmin,ioh,iih,m,p are fixed, VOHMIN,IIH can generally be found from the load manual, Vohmin is generally the device's low-level threshold, IIH is generally the device's rated current (note that the above and non-gate as a load is only an example, and actually load there are many kinds). As we said above, when the output is high, the OC Gate can be opened as an open circuit, that is, the IOH is 0. The above formula can be simplified to:

Rl≤ (vcc-vohmin)/piih

That is, the maximum value of the RL is (vcc-vohmin)/piih, if large, it will not produce the load required high level vohmin.

Okay, take a break. Now we know how to calculate the maximum value of the pull-up resistor. If sometimes the output does not get the required high level, then it is possible that the pull-up resistor is too large (generally 1k~10k, and some say is 4.7k~10k, anyway is greater than 1k bar).

The following continues to calculate the minimum value of the pull-up resistor.

Above is the case where the output F is high, now look at the output F is low level.

When the OC Gate line and output are low, from the most unfavourable case, only one OC gate is in the conduction state, while the other OC doors are cut off (in fact, there may be only one OC door).

As we mentioned above, when the OC Gate output is low, the OC door is saturated, which is equivalent to the collector directly to the ground (but there is still a saturation current IOL), when the pull-up resistor current IRL and load current IIS co-flow to the OC Gate, this time the current IOL is what we often say the sink current (here a digression , even when the pull-up resistor is connected, the output low will consume a very small current.

The RL should not be too small to ensure that when all load currents flow into the only OC gate, the line and output low levels can still be lower than the specified Volmax value, that is, to be able to generate a low level of load requirements.

Vcc-irlrl≤volmax

vcc-(Iol-niis) Rl≤volmax

Rl≥ (Vcc-volmax)/(Iol-niis)

That is, the minimum value of RL is (Vcc-volmax)/(Iol-niis), where Vcc,volmax,iol,niis are known, IOL is probably equal to the saturation current of the pipe, IIS is the load of short-circuit current on the sample can be the minimum value of RL.

That is, the minimum value of the RL is (Vcc-volmax)/(Iol-niis), if the short-circuit current of the load is ignored, if the value of RL is small, then the lower level than the load requirements can be generated lower level.

In summary, (VCC-VOLMAX)/(Iol-niis) ≤rl≤ (vcc-vohmin)/(MIOH+PIIH), if you want to calculate roughly, ignore IIS and IOH, then is (Vcc-volmax)/iol≤rl≤ ( Vcc-vohmin)/piih.