Relationship between Sof, POF, and elf in the Nios

Sof, POF, and elf Sof = FPGA internal SRAM configuration data, which can be downloaded through JTAG. After downloading, the hardware functions of FPGA are implemented. After power loss, the hardware becomes volatile.

POF = configure the flash data of the device and download it to the configuration device in as mode. When the device powers down and is powered on again, FPGA will automatically read the configuration data from the configuration device, and then configure the SRAM inside the FPGA, implement FPGA hardware functions. If the design contains the Nios, And the POF only contains the Nios hardware, after the configuration is completed, the Nios will exist in the FPGA, and the Nios will run according to the preset memory space, if the Reset vector of the specified content is sent to the SDRAM but the content of the SDRAM file is empty, the system will run the program.

You can use the JTAG to load the elf software to the ram of the system, or use the epcs_controller (flash programmer of the system) to load the software to the configuration device (after the POF configuration data ), if the Reset vector of the Nios points to epcs_controller, after the Nios is powered on, the first command is executed from the configuration device.

In addition, the POF file can be converted to a JIC file and downloaded to the EPC through the JTAG method. Therefore, the hardware design can save the as configuration interface.