Research on startup mode of S3C2440

Source: Internet
Author: User

S3C2440Study on startup Methods

No matter what the Startup Device of S3C2440 is, it starts to execute the program from the 0x0000 0000 address. The difference is that the address ing is different. After power-on for an embedded system based on S3C2440, You need to select the boot device first. The 2440 Boot Mode is configured by the mode pins om1 and om0. The 2440 Boot Mode is described as follows:

 

Figure 1 Startup Mode of S3C2440

We can see that the S3C2440 supports two startup modes: NAND and non-NAND (or flash here). The specific method depends on the status of the om0 and om1 pins.

Om [startup method determined by 1:0

When om [1:0] = 00, the processor starts from NAND Flash

When om [1:0] = 01, the processor starts from a 16-bit Rom

When om [1:0] = 10, the processor starts from a 32-bit Rom.

When om [1:0] = 11, the processor starts from test mode.

Since NAND Flash is connected to the NAND Flash Controller rather than the system bus, the address space is not allocated in the 8 banks of s3c2440a. If the S3C2440 is configured to start from NAND Flash, after the S3C2440 is powered on, the NAND Flash Controller automatically moves the first 4 k Data on the NAND flash to the internal SRAM, that is, the so-called "steppingstone". At the same time, the SRAM in this section is mapped to the space (0x00000000) selected by ngcs0 ). The system will start from this internal SRAM. What programmers need to do is to put the core Startup Program in the first 4 K of NAND Flash. That is to say, you need to write a boot program with a length less than 4 K to copy the main program to Ram (usually SDRAM) for running. When the NAND flash mode is enabled, the system cannot see nor flash, because nor flash is also mounted on ngcs0, and the address space of ngcs0 is occupied.

The nor Flash used by tq2440 is AMD's am29lv160db, which is a 16-bit data-bit nor flash. Therefore, when you choose to start from nor flash, the om1 and om0 should be low and high respectively. In this case, nor flash is mapped to the 0x00000000 address (ngcs0, which does not need in-chip SRAM for assistance, and the starting address of In-chip SRAM is still 0x40000000 ). Then 2440 starts running from 0x00000000 (that is, running in nor flash ).

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