RS-485 bus multi-host communication

 

 
Kkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkkk RS-485 bus multi-host communication kkkkkkkkkkkkkkkkk

; Rev. 01.01
; Date: 2005.06.16
By kocom/Huang yexeng
; Use chips: AT89C51, sp485
; Crystal Oscillator: 18.432 m
Circuit description: simple RC power-on reset, P1.7--P1.5 are connected to the LED and throttling resistance to VCC, P1.4--P1.2 are connected to the key touch switch to Gnd

; XD connects to sp485's 1-foot R,
; Txd is connected to sp485's 4-foot D, p3.7 is connected to sp485's 2 and 3-foot RE/de, and sp485's 6-foot data_a is connected to the pulling power

The 7-pin data_ B OF THE 4.7kp133 connector is connected to the drop-down resistor of 4.7 kb.
The data_a, data_ B, And Gnd of each extension are connected and connected to the PC through the RS-485/232 conversion interface.
Operation instructions: This experiment only connected to 3 extension and 1 Pc, extension before power-on first hold a key in the KEY1--KDY3, In order

The corresponding default address is automatically set during conversion.
If you press key1 before power-on, the extension corresponding address is 12340303 H, the same KEY2---12340407, KEY3---12346789.

Function Description: Press key2, 1 # on extension 1 to call data 2 #, 2 #. After address verification and data verification, the corresponding LED is turned on or off,

And returns the response signal to 1,
; 1 # After receiving the response signal, the extension will flash the led three times.
The PC-side serial port debugging software can monitor data on the bus and communicate with each extension in two directions.
PC sets the baud rate to, 8-bit data, odd or even verification, data receiving/sending in hexadecimal format.
For PC, if 55 12 34 04 07 00 00 00 92 6D 70 AA call 1 # Ext, select 1 # reply 55 00 00 00 00 12

34 04 07 AA 55 07 AA
When calling, select the baud rate 2400bps, the data bit is 8 bits, the stop bit is 1 bits, the check bit is none, and the flow control is none; when sending data in PC, you can only use hex

Sending method. one byte and one byte are sent!
For example, if the PC sends 55 12 34 04 07 12 34 03 03 92 6D 74 AA, you will see the actions of 1 # And 2.
****************
; @ R0 -- adjust the data storage address pointer when receiving data
; @ R1 -- Adjust the sending unit address pointer when sending data
; ******************** Serial Communication Knowledge ****************
The working modes 2 and 3 are both 11-bit asynchronous transceiver and serial communication. The differences between the two are only different in the baud rate. Method 2: baud rate = 2

Smod * FOS/64 (smod = 0 or 1)
; Mode 3: baud rate = 2 smod * fosc/32*12 * (initial M-T)
; (1) Data Transmission Ti = 0. Before sending data, set tb8 by the Software. You can run the following command to complete the process: SETB tb8; CLR tb8; and then send it to sbuf.

Write 8-bit data and start
; Serial transmission. After one frame of data is sent, the CPU automatically sets Ti to 1,
(2) when the data is received by Ren = 1, rI = 0, start to receive if SM2 = 0, the received 8-bit data is sent to sbuf, and the 9th-bit data is sent to rb8. if SM2 = 1, the received 9th bits

The data is 0 and no sbuf is sent,
The received 9th-bit data is 1, the data is sent to sbuf, and the 9th-bit data is sent to rb8.
; ******************** Serial Communication Knowledge ****************
; Sm0 SM1 = 11; Working Mode 3; 11-bit asynchronous transceiver baud rate variable (T1 overflow rate/n, n = 32 or 16), SM2 equal to 1, indicating multi-machine communication, Ren connected

If the receiving control is 1, it indicates the promised receipt!
In method 2 or method 3, if SM2 = 0, the serial port works in a single machine sending or receiving mode, Ti and RI are activated in normal mode and interrupt requests are generated.

;
; If SM2 = 1 and rb8 = 1, Ri is activated and interrupt requests are generated;
When tb8 is in Mode 2 and 3, tb8 sends 9th-bit data. In multi-host communication, the status of tb8-bit indicates whether the host sends the address or number.

Data: tb8 = 1 indicates the address, while tb8 = 0 indicates the data.
; Ti sending interruption flag. Ti = 1 indicates that one frame of data has been sent. Note that Ti must be cleared by software in any mode of operation;
; Ri is the same as above
; AT89C51, the interrupt entry address of the serial sending interrupt Ti and receive interrupt RI are both 0023 H, so software query Ti and Ri must be included in the interrupt program

In order to determine whether the receiving or sending is interrupted, and then proceed accordingly.
; Power control register pcon, where smod; Serial Port baud rate doubling bit, in Working Mode 1 ~ If smod is set to 1 when the operating mode is 3

The baud rate is doubled. If smod = 0, the baud rate is not doubled!
Multi-host communication principle: When multi-host communication is performed, the information sent from the host to the slave is divided into address frames and data frames, which are differentiated by a 9th-bit programmable tb8.

ID, tb8 = 0, indicating data; tb8 = 1, indicating address. Full use of multi-host communication
; 89C51 serial control register scon multi-machine communication control bit SM2 features. When SM2 is set to 1, whether the first eight digits of data received by the CPU are sent to sbuf for retrieval

It depends on the status of the 9th-bit rb8 received. If rb8 is set to 1, the first 8 bytes of received data are sent
; Sbuf, the reset Ri generates an interrupt request; If rb8 is set to 0, the first eight digits of the received data are discarded. That is, when the slave machine SM2 = 1, the slave machine can only receive the host to send

The address frame (rb8 = 1) of the data frame (rb8 = 0) is ignored.
; When the slave machine SM2 is 0, can the slave machine receive all information sent by the host?
When communication starts, the host sends the address frame first, Because SM2 of each slave machine is 1

And rb8 = 1, so each slave sends a serial request to receive terminal requests, and uses the serial interrupt service program to determine the address sent by the host and the local

Whether the addresses match,
If they match, the SM2 is cleared to 0, and you are ready to receive the subsequent transmitted data frame. The other slave machines remain SM2 = 1 due to address Mismatch

Status, so you cannot receive data frames sent by the host.
Multi-host communication process: (1) Master/slave machine operation and Mode 2 or Mode 3; host SM2 = 0, Ren = 1; slave machine SM2 = 1, Ren = 1. (2) host placement tb8 = 1,

Sends an addressing address frame to the slave machine. Each slave machine receives the address frame because it meets the receiving conditions (SM2 = 1, rb8 = 1 ).
The address sent to the host and compared with the local address. (3) The same address of the slave machine (The addressable machine) clears SM2 0 and returns the address to the host.

Host check. SM2 = 1 is maintained on the slave (unaddressable) with inconsistent addresses;
(4) Check the returned address of the host. If the returned address is the same as the previously sent address, prepare to send data. If the returned address is different, return the resend address frame (2. (5)

The host sends data to the slave. At this time, the tb8 of the host is 0. Only the selected slave can receive the data.
Other slave machines discard the data. (6) after the end of the communication, the slave machine reset SM2 = 1 and wait for the next communication.
Led1 bit p1.7
Led2 bit p1.6
Led3 bit p1.5
Key1 bit P3.3
Key2 bit p3.4
Key3 bit p3.5
Rxtx bit p2.0

Rxaddress_1 equ 30 h; the received called end address 4 byte
Rxaddress_2 equ 31 H
Rxaddress_3 equ 32 h
Rxaddress_4 equ 33 H
Rxdata_a1 equ 34 h; received call end address 4 byte
Rxdata_a2 equ 35 h
Rxdata_a3 equ 36 h
Rxdata_a4 equ 37 h
Rxdata_d1 equ 38 h; received controlled command 2 byte
Rxdata_d2 equ 39 h
Rxdata_crc equ 3ah; received data parity 1 byte
Rxdata_end equ 3bh; received communication end word aah 1 byte
Loop4_address_save equ 3ch; four address codes are received cyclically
Loop8_data_save equ 3DH; receives 8 Data codes cyclically
Noise1 equ 3eh; key shake-free Delay Parameter
Ledflash equ 3fh; led flashes
Txaddress_1 equ 40 h; terminal address 4 byte sent out
Txaddress_2 equ 41 h
Txaddress_3 equ 42 h
Txaddress_4 equ 43 H
Self_address1 equ 44 h; local address code storage unit 44h--47h
Self_address2 equ 45 h
Self_address3 equ 46 h
Self_address4 equ 47 h
Txdata_d1 equ 48 h
Txdata_d2 equ 49 H
Txdata_crc equ 4ah
Txloop_crc8_byte12 equ 4bh; cyclic parameters, cyclic verification of 8-bit CRC and continuous transmission of 12 bytes

Rx_bit_start bit 20h. 0; start to receive the flag. After 55 H is received, the address code can be received.
Rx_bit_dataenable bit 20h.1; allows receiving data marks. After verification, the address of the local machine is placed in the back position, indicating that the data code can be received.
Flashdata bit 20h.264; data refresh mark. When the Communication receives the received data, it indicates that the receiving is complete and the command control process can be entered.

Collation
Tx_bit_finish bit 20h.3; mark of the completion of the Current byte data transmission

Org 0000 h
JMP start
Org 0023 H
JMP Sint
Sint:
JBC Ri, rxwk; if the receiving is interrupted, the RI flag is cleared and forwarded to the receiving for processing.
CLR Ti; if sending is interrupted, the Ti flag is cleared.
SETB tx_bit_finish; the current byte data has been sent, set the flag
Ljmp send
Rxwk:
MoV A, sbuf
; MoV P0, A; used for debugging
JB rx_bit_start, address_save; confirm to receive the starting word 55 h and transfer it to the address code saving program.
Cjne A, #55 h, send; Before the start flag is 0, 55 h must be detected before entering the receiving program
SETB rx_bit_start
MoV loop4_address_save, #4; uses the following four address codes for loop Parameters
MoV r0, #30 h; address pointer pointing to save address 30 h
Ljmp send
Address_save:; Save the received called address
JB rx_bit_dataenable, data_save; if it has been verified to pass the local address, it is allowed to receive its subsequent data code
MoV @ r0, A; if the address verification fails, continue to receive the address code
; MoV P0, A; used for debugging
INC R0; adjust the storage address
Djnz loop4_address_save, send
Address_check:; local address verification
MoV A, rxaddress_1; get the received called address code
Cjne A, self_address1, erro_address; Verify the 1st-bit address code. Exit if the address is incorrect.
MoV A, rxaddress_2; get the received called address code
Cjne A, self_address2, erro_address; Verify the 2nd-bit address code. Exit if the address is incorrect.
MoV A, rxaddress_3; get the received called address code
Cjne A, self_address3, erro_address; Verify the 3rd-bit address. Exit if the address is incorrect.
MoV A, rxaddress_4; get the received called address code
Cjne A, self_address4, erro_address; Verify the 4th-bit address. Exit if the address is incorrect.
OK _address_check:; address verification passed
CLR SM2; allows receiving data interruptions. Other hosts that have not passed address verification receive data

Code cannot cause interruption
SETB rx_bit_dataenable; allows receiving data flag placement
MoV loop8_data_save, #8; prepare to receive 8-Bit Data codes cyclically
MoV r0, # rxdata_a1; the address Pointer Points to the data code storage address, saving data for the data_save program segment

Preparation
Ljmp send
Erro_address:
Reset_sign_bit:; flag bit Reset
CLR rx_bit_start; disable the start receiving flag to re-enter the start WORD verification for the next communication.
SETB SM2; only the received data is allowed as the address code to cause interruption
CLR rx_bit_dataenable; disable the flag for receiving data codes so that the next communication must be performed locally

Address verification team
Ljmp send
Data_save:
MoV @ r0,
INC R0
Djnz loop8_data_save, send; if eight data codes are not received, wait for the next data
Data_receive_over:; Data received
SETB flashdata; data refresh flag placement
Ljmp reset_sign_bit; reverts to reset the flag bit related to the communication process, and exits
Send:
RETI

Start:
MoV P1, #00 h
Acall Delay
MoV P1, # 0ffh
Set_addr1:
JB key1, set_addr2
MoV self_address1, #12 h; the address of the local machine is set to No. 1234, building 303
MoV self_address2, #34 h
MoV self_address3, #03 h
MoV self_address4, #03 h
JMP set_ OK
Set_addr2:
JB key2, set_addr3
MoV self_address1, #12 h; the address of the local machine is set to No. 1234, building 303
MoV self_address2, #34 h
MoV self_address3, #04 H
MoV self_address4, #07 h

JMP set_ OK
Set_addr3:
JB key3, set_ OK
MoV self_address1, #12 h; the address of the local machine is set to No. 1234, building 303
MoV self_address2, #34 h
MoV self_address3, #67 h
MoV self_address4, #89 h
Set_ OK:
MoV P1, # 0ffh
MoV sp, #07 h
MoV P0, # 0ffh

CLR rxtx; 485 is in the receiving status
CLR flashdata
CLR rx_bit_start; disable the start receiving flag to re-enter the start WORD verification for the next communication.
CLR rx_bit_dataenable; disable the flag for receiving data codes. Communication must undergo local address verification before receiving data.
CLR tx_bit_finish
; MoV scon, # 0f0h
; MoV tmod, #20 h
; MoV Th1, # 0fbh
MoV tmod, #20 h
MoV Th1, # 0f3h
MoV TL1, # 0f3h
SETB tr1
MoV scon, # 0f0h; Serial Port Mode 3. Address/data verification control, allowing receiving
MoV pcon, #00 h
; SETB SM2; only the address code can cause interruption. Only data codes can be received if the address code is verified with the local address code.

Cause relay
SETB EA
SETB es; allow serial port interruption
; CLR SM2 ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; dual-connection with PC

Test for communications, cancel D/A verification

Main:
Iftxdata:

JNB flashdata, key_test; if the communication data is received, data is processed; otherwise, it is transferred to the next program segment.
Ljmp rx_command
Key_test:
JB key1, ifk2fx
MoV noise1, #00 h
K1nie:
JB key1, ifk2fx
Djnz noise1, k1nie
; MoV A, #91 H
MoV txdata_d1, #91 H
MoV txaddress_1, #12 h
MoV txaddress_2, #34 h
MoV txaddress_3, #03 h
MoV txaddress_4, #03 h
Acall txdata
JNB key1, $

Ifk2fx:
JB key2, ifk3fx
MoV noise1, #00 h
K2nie:
JB key2, ifk3fx
Djnz noise1, k2nie
; MoV A, #92 h
MoV txdata_d1, #92 h
MoV txaddress_1, #12 h
MoV txaddress_2, #34 h
MoV txaddress_3, #04 H
MoV txaddress_4, #07 h
Acall txdata
JNB key2, $

Ifk3fx:
JB key3, endifkey
MoV noise1, #00 h
K3nie:
JB key3, endifkey
Djnz noise1, k3nie
; MoV A, #93 h
MoV txdata_d1, #93 h
MoV txaddress_1, #12 h
MoV txaddress_2, #34 h
MoV txaddress_3, #67 h
MoV txaddress_4, #89 h
Acall txdata
JNB key3, $

Endifkey:
JBC flashdata, rx_command
 
Ljmp end_command
Rx_command:; process the received data
CLR flashdata
MoV A, rxdata_end
Cjne A, # 0aah, nopass
MoV B, #0; one CRC is generated from the received 8-bit data and saved to B
MoV txloop_crc8_byte12, #8
MoV R1, # rxaddress_1; pointer to the starting unit of received data
Crc_check:
MoV A, @ r1
INC r1
Add a, #0; Parity indicates that each instruction cycle is set or cleared by the hardware to indicate the parity of the number of digits 1 in the accumulators A. If the number of digits 1 is

If it is an odd number, P is set; otherwise, it is cleared;
MoV C, psw.0; when P is used, the 0th bits in the Status Register are psw.0, which is the base number of even bits!
MoV a, B
RLC
MoV B,
Djnz txloop_crc8_byte12, crc_check
Cjne A, rxdata_crc, nopass
/* Mov dptr, # Information
Find_head:
INC dptr
CLR
Movc A, @ A + dptr
Cjne A, # 0bbh, find_head
INC dptr
CLR
Movc A, @ A + dptr
Cjne A, # 0c6h, find_head
INC dptr
CLR
Movc A, @ A + dptr
Cjne A, # 0d2h, find_head
INC dptr
CLR
Movc A, @ A + dptr
Cjne A, # 0b5h, find_head
INC dptr
CLR
Movc A, @ A + dptr
Cjne A, # 0cah, find_head
INC dptr
CLR
Movc A, @ A + dptr
Cjne A, # 0a4h, find_head
;...; Data verification !!!!!!
;......
*/
MoV A, rxdata_d1; verification function code
MoV P1, rxdata_d1
Cpl
Cjne A, rxdata_d2, nopass
Ljmp checkout_pass
Nopass:
Ljmp end_command
Checkout_pass:
MoV rxdata_crc, #0
MoV rxdata_end, #0; clear the verification code to prevent flash data from mistakenly entering the rx_command
MoV A, rxdata_d1; Retrieve the function code
Cjne A, # 0aah, nexd0
MoV ledflash, #3

Leddisp1:
MoV A, txdata_d1
Cjne A, #91 H, leddisp2
MoV A, # 01111111b
Ljmp ledply
Leddisp2:
Cjne A, #92 h, leddisp3
MoV P1, # 101111b
MoV A, # 101111b
Ljmp ledply
Leddisp3:
Cjne A, #93 h, leddisp_end
MoV A, # 11011111b
Ljmp ledply
Leddisp_end:

Ledply:
MoV P1,
Acall Delay
MoV P1, # 111111b
Acall Delay
Djnz ledflash, ledply
Ljmp nexd3
Nexd0:
Cjne A, #91 H, nexd1
; MoV P1, # 01111111b
Cpl led1
MoV txdata_d1, # 0aah; receives the correct message and replies to ack.
MoV txaddress_1, rxdata_a1
MoV txaddress_2, rxdata_a2
MoV txaddress_3, rxdata_a3
MoV txaddress_4, rxdata_a4
Acall Delay
Acall Delay
Acall txdata
Ljmp nexd3
Nexd1:
Cjne A, #92 h, nexd2
; MoV P1, # 101111b
Cpl led2
MoV txdata_d1, # 0aah; receives the correct message and replies to ack.
MoV txaddress_1, rxdata_a1
MoV txaddress_2, rxdata_a2
MoV txaddress_3, rxdata_a3
MoV txaddress_4, rxdata_a4
Acall Delay
Acall Delay
Acall txdata
Ljmp nexd3
Nexd2:
Cjne A, #93 h, nexd3
; MoV P1, # 11011111b
Cpl led3
MoV txdata_d1, # 0aah; receives the correct message and replies to ack.
MoV txaddress_1, rxdata_a1
MoV txaddress_2, rxdata_a2
MoV txaddress_3, rxdata_a3
MoV txaddress_4, rxdata_a4
Acall Delay
Acall Delay
Acall txdata
Ljmp nexd3
Nexd3:
End_command:
Ljmp iftxdata

Delay:
MoV R5, #4
Loop1:
Djnz R7, $
Djnz R6, loop1
Djnz R5, loop1
RET

Txdata:
MoV txdata_crc, #0
MoV txloop_crc8_byte12, #8
MoV R1, # txaddress_1; pointer to the starting unit of the data to be sent
Crc_takeplace:
MoV A, @ r1
INC r1
Add a, #0
MoV C, p
MoV A, txdata_crc
RLC
MoV txdata_crc,
Djnz txloop_crc8_byte12, crc_takeplace

SETB rxtx
MoV A, #55 h; sending start WORD 55 h
SETB tb8; indicates the address Frame
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

MoV A, txaddress_1; sending terminal address code 1
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

MoV A, txaddress_2; sending terminal address code 2
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

MoV A, txaddress_3; sending terminal address code 3
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

MoV A, txaddress_4; terminal address code 4
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

CLR tb8; indicates the data frame
MoV A, self_address1; send local address code 1
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

MoV A, self_address2; send local address code 2
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

MoV A, self_address3; send local address code 3
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

MoV A, self_address4; send local address code 4
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

MoV A, txdata_d1; original data sending code
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

; MoV A, txdata_d2; send data anti-code
MoV A, txdata_d1
Cpl
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

MoV A, txdata_crc; send CRC verification characters
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish

MoV A, # 0aah; End message Aah
MoV sbuf,
JNB tx_bit_finish, $
CLR tx_bit_finish
CLR rxtx
RET

Information:
DB "kocom communication part"
DB "Rev. 01.01"
DB "Date: 2005.06.16"
DB "R & D/Huang yesheng"
End