RS422/RS485 BUS Model Analysis and Application

RS422/RS485 BUS Model Analysis and Application

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Source: China Power Grid Author: Li Deqing, Song Bin

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0 Introduction

RS422/RS485 bus interface, as an electrical specification for multi-point and differential data transmission, has become one of the more widely used standard communication interfaces in the industry. RS422/RS485 standard only specifies the electrical characteristics of interfaces, and does not involve connectors, cables or Protocols. Therefore, users can establish their own high-level communication protocols on this basis.

1. Basic Principles

RS422/RS485 standard is fully known as TIA/EIA-422-B and TIA/EIA-485 serial communication standard. Their data signals all adopt differential transmission, also known as balanced transmission. The two are very close to each other in terms of electrical properties. The difference is that the transmission mode is different.

The typical RS485 Mode 1 is shown. A typical RS485 drive uses A pair of twisted pair wires and defines the first line as A and the other line as B. The half-duplex communication mode is used when the two wires work. The working status (sending and receiving) is determined by the enable control signal.

Generally, the forward voltage between drive A and drive B is + 2 ~ + In the 6 V era, A table is in A logical state. The negative levels between A and B are between-6 and ~ -In the 2 V era, the table has another logical state. There is also a Signal Location C. In fact, in many cases, the connection between signals is ignored. We recommend that you use a low-resistance channel to connect signals to increase common-mode anti-interference capability and reduce electromagnetic radiation. The ENABLE control signal E is used to cut and connect the drive to the transmission line. When the ENABLE function, the transmitter is in a high-impedance state, which is called the "third State ", it is the third State different from the logic "1" and "0.

The receiver and the driver are similar to the provisions of the receiver, the initiator can be through the balanced twisted pair to connect the A-A and B-B. When there is an electrical frequency greater than 200 mV between the receiving end A and B, the output is A positive logic level; if it is less than-200 mV, the output is A negative logic level. In the receiver's receiving balancing line, the level range is usually between 200 and ~ Between 6 V.

Generally, logic 1 (positive logic level) is the State of B> A, and logic 0 (negative logic level) is the State of A> B, the pressure difference between A and B is no less than 200.

The four-line working status of RS485 is basically the same as that of RS422. Physically, RS422 is equivalent to two RS485 nodes working simultaneously, one working in the receiving status and the other working in the sending status.

2. Signal Analysis

According to the preceding description, a signal analysis model is established for RS422/RS485 transmission characteristics. RS485 is used as the analysis object because it is more representative. RS485 is a typical signal processing standard, as shown in Transfer Function Model 2.

When defining a domain according to Figure 2, D represents the digital signal (TTL level or CMOS level) output by the microprocessor. The logical signal value is {0, 1 }; dr represents the digital signal (TTL level or CMOS level) received by the microprocessor. The logical signal value is {0, 1}; E, and EN is the enable signal. The connection between the driver and the receiver and the transmission line (high-level or low-level effective control) has two conditions: ENABLE is defined as the valid connection status, DISABLE is not connected, the value space is {ENABLE, DISABLE }. In RS485 communication standards, E and EN are normally prohibited if one is valid, while RS422 is valid. A and B are the interface voltages of the drive and transmission lines, the specification is defined as (-6 V, + 6 V); Ar, Br is the voltage of the receiver and transmission line interface. To realize RS422/RS485 interface compatibility, it should be defined as (-7 V, + 10 V ). In fact, there are four types of driver transfer function definitions that can meet RS485 communication standards:

D = 1, E = DISABLE, output A, B status is not fixed;

D = 0, E = DISABLE, output A, B status is not fixed;

D = 1, E = ENABLE, output B-A> 2 V, and A, B (6 V, + 6 V );

D = 0, E = ENABLE, output A-B> 2 V, and A, B (6 V, + 6 V ).

Therefore, all the circuits that can realize the above transfer functions can be used as the reference design of RS485 drivers. Of course, they also need to meet their input and output characteristics.

The definition of the function passed from the receiver can divide the receiver into two types, one is EN = DIABLE, which is equivalent to the drive is not mounted on the bus (it can be considered that there is no ). The second is EN = ENABLE, and there are two normal working conditions at this time. First, when Dr = 1 is output, Br-Ar> 200 mV; second, when Dr = 0 is output, ar-Br> 200.

In order to meet the needs of the normal operation of the receiver, the following situations must also be taken into account:

(1) the voltage range of Ar and Br should be strictly limited to-7 ~ 10 V. Otherwise, the device may be damaged. Generally, voltage is limited by a regulated Diode Network.

(2) identify the receiver data when | Ar-Br | <200 mV. Generally, the resistance network can be used to connect the Ar to VCC through the resistance of 10 KB, and connect the Br to the GROUND through the resistance of 10 KB, when there is no signal transmitted on the bus, the Ar level can be kept to about 3.2 V, and the Br level is about 1.6 V, so that even if there is interference signal, it is also difficult to generate its initial signal 0 for serial communication.

(3) In general, in order to reduce the reflection of transmission signals on the line, a 100 Ω resistor can be connected to the remote end of the RS422 bus cable, at the beginning and end of the RS485 network transmission line, a matching resistance of 120 Ω should be connected.

3. Engineering Implementation

According to the above analysis, a practical application circuit compatible with RS422 and RS485 is provided here. Its specific circuit is 3.

Figure 3 the chip used in the circuit is MAX491ESD. When using MAX491ESD for RS422 communication, the patch CAP should be installed on the JP2 pins 2 and 1, and the JP1 and JP3 patch caps should be removed. When it is used as RS485 communication, install the patch cord cap on Pin 2 and 3 of JP2, and add a patch cord cap to JP1 and JP3 to form the RS485 network of the two nodes. The regulator D1 and D2 are used to strictly limit the voltage of A to-7V ~ + 12 V to effectively protect RS422/RS485 networks. The increase of D3 and D8 is mainly aimed at preventing surge voltage. The actual circuit is built based on the signal analysis model and can meet the expected requirements in actual testing and operation.

4 Conclusion

This paper analyzes the hardware structure of RS422/RS485 network from the perspective of signal processing, abstracts it into a signal processing analysis model, and gives the corresponding transfer function and definition domain.