RS485 chip Introduction and typical application circuit

First, RS485 basic knowledge

RS-485 interface chip has been widely used in industrial control, instrumentation, instrumentation, multimedia networks, electromechanical integration products and many other fields. There are also more and more types of chips available for RS-485 interfaces. How to find the most suitable chip in a wide range of interface chips is a problem in front of every user. RS-485 interface in different use situations, the requirements of the chip and the use of different methods. The user in the chip selection and circuit design should consider what factors, due to the inherent characteristics of some chips, some of the communication problems even need to adjust the software, and so on. I hope this article will help you solve some common problems with the RS-485 interface.

1 RS-485 Interface Standard

Transmission mode: Differential

Transmission media: Twisted pair

Number of standard nodes: 32

Maximum communication distance: 1200m common-mode voltage max, min: +12v;-7v

Differential input range: -7v~+12v

Receiver Input Sensitivity: ±200mv

Receiver Input Impedance: ≥12kω

2 node count and half-duplex and full-duplex communication

2.1 Node points

The so-called number of nodes, that is, each RS-485 interface chip driver can drive the number of standard RS-485 load. According to the regulation, the standard RS-485 interface input impedance is ≥12kω, the corresponding standard drive node number is 32. To accommodate more nodes, the input impedance of some chips is designed to be 1/2 load (≥24kω), 1/4 Load (≥48kω) or even 1/8 load (≥96kω), the corresponding number of nodes can be increased to 64, 128 and 256. Table 1 is the number of nodes for some common chips.

Table 1

Number of nodes model

32sn75176,sn75276,sn75179,sn75180,max485,max488,max490

sn75lbc184

max487,max1487

max1482,max1483,max3080~max3089

2.2 Half Duplex and full duplex

The RS-485 interface can be connected to half-duplex and full-duplex two communication modes. Half-duplex communication chip has SN75176, SN75276, sn75lbc184, MAX485, MAX 1487, MAX3082, MAX1483, etc., the full-duplex communication chip has SN75179, SN75180, max488~max491, MAX1482 and so on.

(a) Half-duplex communication circuit

(b) Full-duplex communication circuit

3 Frequently Asked questions in the application

3.1 Anti-Lightning and antistatic shock

The RS-485 interface chip may be damaged by static electricity when used, welded or transported in the equipment. When the transmission line is erected outdoors, the interface chip and even the whole system may be struck by lightning. The use of antistatic or anti-lightning chip can effectively avoid such losses, the common chip has max485e, max487e, max1487e and so on. Especially worth mentioning is the sn75lbc184, it can not only withstand the impact of lightning and can endure up to 8kV of electrostatic discharge impact, is currently a rare product on the market.

3.2 Limit Slope Drive

Because the signal in the transmission process will generate electromagnetic interference and terminal reflection, so that the effective signal and invalid signal in the transmission line overlap each other, serious will make the communication can not be normal. To solve this problem, some chip drivers are designed to limit the slope, so that the output signal edge should not be too steep, so as not to generate excessive high-frequency components on the transmission line, so as to effectively curb the generation of interference. such as MAX487, sn75lbc184 and so on have this function.

3.3 Fault Protection

Fault protection technology has been produced in the past two years, some new RS-485 chips have adopted this technology, such as SN75276, max3080~max3089. What is fault protection and why is fault protection, and what happens if there is no fault protection?

As we all know, the RS-485 interface is a differential transmission mode, the communication between each node is through a pair (half duplex) or two pairs (full duplex) twisted pair as the transmission medium. According to the RS-485 standard, the receiver receives a sensitivity of ±200mv, that is, when the differential voltage at the receiving end is greater than +200 MV, the receiver output is high, the receiver output is low when less than, equal to -200mv, and the receiver output is in an indeterminate state when it is between ±200mv. If no special measures are taken when all nodes on the bus are idle i.e. the transmission line is receiving State and when the transmission line is open or short-circuited, the receiver may output a high level or output a low level. Once the receiver of a node produces a low level, the serial receiver (UART) cannot find the starting bit, which can cause communication anomalies, there are two ways to solve such problems:

(1) using a chip with fault protection, it will be in the bus open, short-circuit and idle situation, so that the output of the receiver high level. Ensure that the receiver output high level when the bus is idle and short-circuit is implemented by changing the receiver input threshold. For example, the Max3080~max 3089 input sensitivity is -50mv/-200mv, that is, when the differential receiver input voltage UA-B≥-50MV, the receiver output logic high, if ua-b≤-200mv, the output logic low level. When the receiver input bus is shorted or all transmitters on the bus are disabled, the receiver differential input is 0V, which causes the receiver to output a high level. In the same vein, the sensitivity of SN75276 is 0mv/-300mv, thus achieving the purpose of fault protection.

(2) If the use of chips without fault protection, such as SN75176, MAX1487, etc., you can do some processing on the software, so as to avoid communication anomalies. That is, before entering normal data communication, the bus is pre-driven by the host to be greater than +200mv, and for a period of time, so that all nodes of the receiver produces high-level output. In this way, when the valid data is emitted, all receivers can correctly receive the starting bit and receive the complete data.

3.4 Photoelectric Isolation

In some industrial control fields, the following three problems are noted in the circuit design due to the complex situation of the scene and the complex environment of the scene.
Second, RS485 application design
1 design of SN75176 485 chip de control terminal

As the application system, the host and extension distance, the total length of the communication line is often more than 400 meters, and the extension system
Power-On or reset is often not done at the same time. If at this point a 75176 of the de terminal potential is "1", that
Its 485 bus output will be in the sending State, that is, the use of the communication bus, so that the other extension can not
Host for communication. This is especially true in cases where an extension is abnormal (in the event of a crash), which causes the entire system to communicate
Collapse. Therefore, in the circuit design, should ensure that the system power-on reset 75176 of the de terminal potential is "0". Since 8031 in the complex
Bit period, I/O port output High level, so Figure 2 Circuit connection method to effectively solve the reset period extension "bite" bus problem.

parameter selection of 2 isolated opto-coupler circuit

In the application system, because of the real-time monitoring and response to the scene, the baud rate of the communication data tends to be more
High (usually above 4800 baud). Limiting the "bottleneck" of increased communication baud rates is not a live wire (field
Construction generally uses 5 types of unshielded twisted pair, but in the single-chip microcomputer system for signal isolation of the optocoupler circuit. This
Use TIL117. High-speed Optocoupler can be considered in circuit design, such as 6n137, 6n136 and other chips, can also optimize the general
The design of the parameters of the Optocoupler circuit enables it to work in the best condition. For example: Resistance R2, R3 if the choice is large, it will
The Optocoupler light-emitting tube from the cut-off into saturation becomes slower, if the choice is too small, the exit saturation will be very slow, so these two
The values of the resistors are carefully selected, and the different types of optocouplers and drive circuits make the values of the two resistors slightly different, which
A bit in the circuit design to be particularly cautious, not arbitrary, usually can be determined by the experiment.

3 485 bus output circuit part of the design

The design of the output circuit should fully take into account the various disturbances on the line and the matching of the line characteristic impedance. Due to the engineering environment
More complex, the site often various forms of interference sources, so the 485 bus transmission end must be added protection measures. In the electrical
The circuit design adopts the D1 and D2 of the regulator tube, and can also select the TVs transient clutter suppressor which can resist the surge.
485 chips (such as sn75lbc184, etc.) that can resist lightning strikes.

Consider the special conditions of the circuit (such as the 485 chip of an extension is penetrated short-circuit), in order to prevent other points in the bus
75176 of the 485 signal outputs are connected in series with two 20ω resistors R10, R11. So this machine's
A hardware failure will not affect the communication of the entire bus.

In the field construction of application system engineering, because the communication carrier is a twisted pair, its characteristic impedance is about 120ω,
So the circuit design, in the RS-485 network transmission line at the beginning and end of each Bell 1 120ω matching resistor (1
R8) to reduce the reflection of the transmitted signal on the line.

Due to the characteristics of the RS-485 chip, the receiver's detection sensitivity is ±200mv, i.e. the differential input terminal va-vb≥
+200MV, Output logic 1,va-vb≤-200mv, output logic 0, and the absolute value of a and B terminal potential difference is less than 200mV
, the output is indeterminate. If all transmitters on the bus are disabled, the receiver outputs logic 0, which is mistaken for the
The start of the letter frame is not working properly. The solution to this problem is to artificially make the A-terminal potential higher than the B-end potential, so
The level of the rxd when the 485 bus is not sent (when the bus is suspended) The unique high level, 8031 MCU will not be mistaken
Interrupt and receive random characters. By adding pull-up, pull-down resistor R7, R9 on the output end of the A and b outputs of the 485 circuit, it is very good to
Solve the problem.

                                                    Figure 1 RS485 application typical circuit
three , software programming  

485 the software programming of the chip has a great influence on the reliability of the product. Since the 485 bus is the total   of the asynchronous half-duplex communication, the
line, at some point, the bus may only present a state, so this method is generally applicable to the host to the extension of the query  
mode of communication, the bus must have a always in the host status of equipment in the inspection of other extensions, Therefore, it is necessary to make a   the
set of reasonable communication protocols to coordinate the bus share sharing. In this case, the packet communication method is used. The communication data is framed  
packets are sent, each packet of data has a boot code, length code, address code, command code, content, check code and other components.  
Where the boot code is the boot header used to synchronize each packet of data, the length code is the total length of the packet data, the command code is the host  
Command for the extension (or the extension answer host), the address code is the local address number of the extension, the "content" is the package number  
The verification code is the check mark of this packet data, it can use different square  , such as parity check and check, and so on.
type.  

in 485-chip communication, pay particular attention to the software programming of the 485 control-side de. In order to work reliably, in the 485 , the
Bus status switch needs to do the appropriate delay, and then the data sent and received. The specific practice is to   in the data sending State, the
will control the end of "1", delay time of about 1ms, then send valid data, a packet of data sent after the end of the delay  
1ms, the control end "0". Such processing will make the bus in the state switch, there is a stable working process.

RS485 Chip Introduction and typical application circuit