S3C2410 clock signal: fclk, hclk, and pclk; clk_get_rate ()

S3C2410 has three clock flck, hclk, and pclk (these three are the core hour hands)
The S3C2410 chip has such a paragraph:
Fclk is used by ARM920T, kernel clock, clock speed.
Hclk is used for AHB Bus, which is used by the ARM920T, the memory controller, the interrupt controller, the LCD controller, the DMA and USB Host block. that is, it provides clock signals for peripherals on the AHB Bus, including USB clock. The AHB Bus is used to connect high-speed peripherals.
Pclk is used for APB bus, which is used by the peripherals such as wdt, IIS, I2C, PWM timer, MMC interface, ADC, UART, gpio, RTC and SPI. that is to say, it provides a clock signal for peripherals on the APB bus, that is, the I/O interface clock. The serial clock settings are from pclk. The APB bus is used to connect low-speed peripherals.
The S3C2410X supports selection of dividing ratio between fclk, hlck and pclk. This ratio is determined by hdivn and pdivn of clkdivn control register.
The ratio of fclk, hlck, and pclk can be changed by setting the hdivn bit (1st bits) and pdivn bit (0th bits) of the clkdivn control register.

How can we obtain the hourly frequency of fclk, hlck, and pclk?
You can first obtain a CLK struct through clk_get

/* Clk_get get the hour hand named ID * Input Dev: It can be null. * Input parameter ID: the name of the hour hand, such as fclk, hclk, and pclk. * Return value: return the CLK struct of the clock. */ Struct CLK * clk_get (struct device * Dev, const char * ID) Struct CLK { Struct list_head list; Struct module * owner; Struct CLK * parent; Const char * Name;/* The Name Of The hour */ Int ID; Int usage; Unsigned long rate;/* clock frequency */ Unsigned long ctrlbit; INT (* enable) (struct CLK *, int enable ); INT (* set_rate) (struct CLK * C, unsigned long rate ); Unsigned long (* get_rate) (struct CLK * C ); Unsigned long (* round_rate) (struct CLK * C, unsigned long rate ); INT (* set_parent) (struct CLK * C, struct CLK * parent ); };

Then pass the CLK struct returned by clk_get to clk_get_rate to obtain the clock frequency.

Unsigned long clk_get_rate (struct CLK * CLK)

Example:

Printk (kern_debug "fclk = % d, pclk = % d, hclk = % d, uclk = % d \ n ", Clk_get_rate (clk_get (null, "fclk ")), Clk_get_rate (clk_get (null, "hclk ")), Clk_get_rate (clk_get (null, "pclk ")), Clk_get_rate (clk_get (null, "uclk ")));

Here there is another hour-hand uclk, which provides the hour-hand signal to the USB. Uclk is an external hour hand source. It is introduced by gph8/uclk pins of the S3C2410 chip to provide the UART with an external hour hand signal to obtain a more accurate hour hand frequency.
 
About AMBA On-Chip Bus
AMBA (advanced microcontroller bus architecture) is an on-chip bus specification proposed by arm. The AMBA 2.0 specification consists of four parts: AHB (AMBA High Performance Bus), ASB (AMBA System Bus), APB (AMBA Peripheral Bus), and test methodology.
The advanced high-performance bus (AHB) is used to connect high-performance, high-clock-frequency system modules (such as CPU, DMA, and DSP) it forms a high-performance system backbone bus (back-bone Bus ). Peripherals on AHB Bus include LCD controller (cont stands for Controller), USB Host cont, extmaster, Nand cont, NAND FLASH Boot Loader, bus cont, interrupt cont, power management, memory
Cont (SRAM/NOR/SDRAM, etc ).
The Advanced System Bus (ASB) is the first generation of AMBA system bus. Compared with AHB, its data width is smaller, it supports 8-bit, 16-bit, and 32-bit typical data widths.
The Advanced Peripheral Bus (APB) is a local secondary bus that is connected to AHB/ASB through a bridge. It is mainly used to interconnect devices that do not require high-performance pipeline interfaces or high-bandwidth interfaces. Peripherals on APB bus include UART, USB device, SDI/MMC, Watch Dog Timer, bus cont, SPI, IIC, IIS, gpio, RTC, ADC, Timer/PWM.