s5pv210 AD Conversion

1:adc:analog-to-digital Converter, analog signal to digital signal, nature is generally analog signal, and SOC need digital signal, so communication between need ADC.

2: Conversion principle:

Take the example of successive approximation ad conversions:

Here take 8 bits for example, and S5PV210SOC is optional 10bit, 12bit;

(1) First issue "start signal" signal s. When S is from high to low, the "successive approximation register SAR" clear 0,DAC output vo=0, "comparator" Output 1. When s becomes high, the "control circuit" enables the SAR to start working.
(2) The SAR first produces 8 bits of the digital half, that is 10000000B, to test the Vi size of the analog, if VO>VI, "control circuit" to clear the highest bit, if VO<VI, retain the highest bit.

(3) After the highest position is determined, the SAR also determines the sub-high level by the sub-search method, that is, the size of the analog VI is tested by half y1000000b (y as the determined bit) of the lower 7 bits. After the BIT6 is determined, the SAR determines the BIT5 bit by the sub-search method, which is to test the size of the analog VI by half yy100000b (y as the determined bit) of the lower 6 bits. Repeat this process until the lowest bit bit0 is determined.

(4) After the lowest bit bit0 is determined, the conversion ends and the "control circuit" emits the "end of conversion" signal to the EOC. The falling edge of the signal has a "buffer register" for the SAR output lock, resulting in a digital output. From the conversion process can be seen: The start signal is a negative pulse effective. The conversion end signal is low level.

For example, the full scale should be 5V, so the first da output 2.5V, the input voltage and 2.5V comparison, the input voltage is large, so take 2.5v-5v between, that is, the highest bit retention 1. Then take the intermediate voltage in the new range, i.e. 3.75V, and so on ....

ADC Characteristics of the 3:S5PV210

(1) Precision 10bit/12bit;

(2) Maximum conversion rate 1MSPS

(3) Analog voltage range 0-3.3

(4) can set the normal ad mode (that is, touch screen touchscreen mode switch to normal ad mode)

3:AD Operating Clock clock frequency

The s5pv210 ADC clock is connected to the Pclc_psys bus (Pclc_psys clock bus frequency is 66MHz), generally set the divider bit 65, the ADC clock bit 1MHz, the conversion rate at this time is 1/200khz,

The maximum ADC clock can be set to 5MHz, and the corresponding maximum conversion rate is 1MSPS.

4:ADC data can be obtained by polling, interrupt, or interrupt mode, and the conversion time is delayed by the return time of the interrupt process and the read time of the data. By polling, as long as the Access status register Tsadcconn,

You can know if the conversion is complete. After the conversion is completed, read the values of the TSDATXN and Tsdatyn two registers.

5:s5pv210 10 ADC pin ain[0]~ain[9] respectively for XADCAIN[0]~XADCAIN[9] Pins

6: Common Registers

TSADCCON0:

Bit16 set AD conversion accuracy, 10bit, 12bit optional;

BIT15 read-only, status register, see if the conversion is over;

bit14 prescaler Switch, set to 1;

Bit13:6 Frequency Multiplier, if you want to set 3.3MHz, can be set to 19,66/19+1=3.3, the maximum setting frequency is 5MHz, so this bit minimum value is: 13

Bit2 set to Normal mode

Bit1 whether the Read star mode is turned on, the read star mode means that the ad conversion is restarted by simply reading the ad-converted register data, and the first read data is discarded using this mode;

Bit0 turn on ad conversion, if the Read star mode is set, this bit is invalid;

Tsconn:touch Screen Control register.

TSDATXN: Data Register

bit14 View output Data bit ADC or touch screen

bit11:0 for converted Data

Tsdatyn: Data Register

bit14 View output Data bit ADC or touch screen

bit11:0 for converted Data

CLRINADCN: Clear Interrupt Write any value can be; ADC Interrupt Clear Register

Admux Register

7: Programming

#define Tsadccon00xe1700000#definetscon00xe1700004#define Tsdatx00xe170000c#define Tsdaty00xe1700010#define Clrintadc00xe1700018#define adcmux0xe170001c#define _reg_tsadccon0* (unsigned int*) 0xe1700000#define_reg_tscon0* ( unsigned int*) 0xe1700004#define _reg_tsdatx0* (unsigned int*) 0xe170000c#define _reg_tsdaty0* (unsigned int*) 0xe1700010#define _reg_clrintadc0* (unsigned int*) 0xe1700018#define _reg_adcmux* (unsigned int*) 0xe170001cstatic void Adc_init (void) {_reg_tsadccon0 |= (1 << 16);//Set Precision is 12bit_reg_tsadccon0 |= (1 << 14);//Enable Presaler_reg_ TSADCCON0 &= ~ (0xFF << 6);//Set the Clock _reg_tsadccon0 |= (2 << 6), _reg_tsadccon0 &= ~ (1 <<);//standb Y is normal mode _reg_tsadccon0 &= ~ (1 << 1),//read_start Disable_reg_adcmux &= ~ (0xF << 0);//set MUX switch to ACD1 }static void Delay_1 (void) {volatile int x, y;for (x=0; x<5000; x + +) {for (y=0; y<1000; y++);}} void Adc_test (void) {unsigned int valx, Valy;adc_init (), while (1) {//start ADC conversion _reg_tsadccon0 |= (1 << 0);Read the status bit, whether the conversion is complete, if bit15 bit 0, read while (! _reg_tsadccon0 & (1 << 15))) {0;} Read the ADC converted data Valx = _reg_tsdatx0;valy = _reg_tsdaty0;printf ("x:bit14 =%d\n", (Valx & (1 <<)));p rintf ("X:bit 11-0 =%d\n ", (Valx & (0xFFF << 0)));p rintf (" y:bit14 =%d\n ", (Valy & (1 <<)));p rintf (" y:bit11-0 = %d\n ", (Valy & (0xFFF << 0));d elay_1 ();}}

　　

s5pv210 AD Conversion