Scatter file Preparation

Source: Internet
Author: User

(same as "arm embedded Technology Fundamentals" 186-190 pages) Scatter Document Writing An image file can contain more than one domain (region), and each domain can have a different address when the image file is loaded and run. Each domain can include up to 3 output segments, each of which consists of several input segments that have the same properties. This allows the ARM linker to know the following two information when generating an image file.
    • The grouping information determines which input segments are organized by the output segments in each domain.
    • Positioning information determines the starting address of each domain in the storage space.
Depending on the complexity of the address mappings in the image file, there are two ways to tell the ARM linker about these related information. You can use command-line options for simple address mapping relationships in an image file, and you can use a scatter configuration file for complex address mapping relationships in an image file. Scatter files, also known as scatter-loaded files, will focus on how to write scatter files. 1 , scatter file structureThe scatter file is a text file that uses BNF syntax to describe the information that is needed when an ARM linker generates an image file. Specifically, you can specify the following information in the scatter file:
    • Load-time start address, maximum size, and attributes for each load-time domain;
    • Each load time domain contains the output segments;
    • Runtime start address, maximum size, storage access characteristics, and attributes for each output segment;
    • The input segments that are included in each output segment.
A scatter file contains several load domains, one load field contains several output segments, and one output segment consists of several input segments with the same properties, as shown in structure 1

Figure 1 Scatter file structure description of the load time domainThe load time domain includes the name, start address, properties, maximum size, and a list of run-time domains. Using the BNF syntax description, the format of the load time domain is as follows:

Load_name base_designator attribute max_size{...}

  • The Load_name runtime domain name, which is used to form the linker-generated link symbol, in addition to uniquely identifying a runtime field;
  • Base_designator is used to represent the starting address of this load-time domain, which can be represented in two formats: Start address or offset;
  • Attribute the properties of this load-time domain, the possible values are one of the following, and the default value is absolute:
  • PI position Independent property;
  • RELOC re-positioning;
  • ABSOLUTE Absolute Address;
  • Max_size maximum size, the linker will report an error if the actual size of this load-time domain exceeds the value. The default value is 0xFFFFFFFF.
description of the output segmentThe output segment includes a name, a start address, a property, a maximum size, and a collection of input segments. Using the BNF syntax description, the format of the output segment is as follows:

Output_name base_designator attribute max_size{...}

  • The name of the Output_name output segment, which uniquely identifies an output segment and is used to form the linker-generated link symbol.
  • The base_designator is used to represent the starting address of this output segment, which can be in two formats: The starting address value or the offset.
  • Attribute represents the properties of this output segment, and its possible values are as follows:
  • PI position Independent Properties
  • RELOC re-positioning
  • ABSOLUTE Absolute Address
  • Fixed fix address
  • UnInit Uninitialized data
  • MAX_SIZE Specifies the maximum size of this output segment.
Description of the input segmentThe input segment describes the pattern of a text string, and the input segments that match the pattern are included in the current field. The pattern can use a match, the symbol "*" for 0 or more characters, the symbol "?" to represent a single character.    When a match is made, all characters are case-insensitive. Here are some examples of configuring image file address mapping patterns using the scatter file.    In this example, the image file includes a load time domain and 3 contiguous output segments, which are suitable for programs that load other programs into RAM, such as the operating system's boot program and Angel. Example of a simple scatter file

load_1   0x4000             The name of the load-time domain is load_1 and the starting address is 0x4000{         er_ro    + 0      output Segment name Er_ro, address offset 0, so the starting address is 0x4000          {* (+ RO)}        wildcard *, contains all the RO properties of the input segments, they are continuously placed           er_rw    + 0    ; output segment name ER_RW, starting address is the end address of the previous output segment plus offset 0           {* (+  RW)}     ; This output segment contains all the input segments of the RW attribute, which are continuously placed Er_zi 0x5000      ; output segment name Er_zi, start address 0x5000           {* (+  ZI)}     ; This output segment contains all the input segments of the ZI attribute, which are placed consecutively}

As described in the example scatter file, the ARM linker generates the corresponding image file address mapping relationship, as shown in 2.

Figure 2 Program run-time address mapping relationship 2 , fixed-time domainAny image file needs to specify an initial entry point (Initial Entry point), which is the entry points that affect the file runtime. The initial entry point must be in a fixed domain, where the domain is loaded with the same address and run-time address.    If the initial entry point is not in a fixed domain, the ARM linker generates the following error message when it is linked. L6203e:entry point (0x0000 0000) lies within Non-root regions three bit RAM when using scatter files, there are two ways to set up a fixed domain. Set Output segment addressThe 1th method is to set the run address of the 1th output segment in the load domain to be the same as the load address for that load domain.    The output segment is then a fixed field. Example 1 uses this method to determine the fixed domain.    Where the starting address of the load domain lr_1 is 0x8000, the starting address of the output segment Er_ro is specified as 0x8000, and the starting address of the load domain lr_1 is the same, so the output segment Er_ro is a fixed domain and is the initial entry point for the image file. Example 1 specifying a fixed field

lr_1 0x08000               ; load domain lr_ The starting address for 1 is 0x8000{     er_ro 0x08000         ; output segment ER The starting address for _ro is 0x8000     {* (+  RO)           Contains all the RO data, including the initial entry point     }    ; other content}

Set Output Segment PropertiesThe 2nd method is to set the properties of an output segment to fixed. Example 2 specifying a fixed field

lr_1 0x8000                 Loading time domain lr_1 start address is 0x8000{     er_ro    0x8000     {          * (+  RO)           Except INIT.O, RO data     }     er_init 0x9000 fixed   Set the output segment property to fixed, determine the fixed field      {     init.o (+  RO)           This output segment contains the INIT.O, which contains the initial entry point of the image file     }    ; other parts of the content}

3 , an example of a real systemIn an embedded device, in order to maintain a good price/performance ratio, there are usually many kinds of memory in the system. In an actual arm development Board, it may include on-chip flash, RAM, and off-chip flash, RAM. In this example, we assume that an embedded system is constructed with an arm chip that contains 8KB on-Chip flash memory, 16KB on-chip RAM memory, an off-chip flash with a starting address of 0x80000000, and an off-chip ram with a starting address of 0x81000000.    Its address space allocation relationship is shown in 3. In such an arm system, we wrote the program and distributed the address of the image file according to the distributed loading file in Example 3. The assigned address image is shown in relationship 4.

Figure 3 Address space in an ARM system Figure 4 address image relationship from Figure 4, you can see that the executable code is placed in an out-of-chip flash, and the vector    The S-vector table is placed on the start address of the off-chip flash, the data of the startup target file is placed in on-chip RAM, the stack is placed on the top of the on-chip RAM, and the other data is placed on the out-of-chip RAM, followed by the heap space. Example 3 scatter file for out-of-chip Flash Launcher Program

Rom_load  0x80000000                  Define load Zone name rom_load, start address 0x80000000{     rom_exe  0x80000000               Define execution code space, starting address same as load domain address     {         STARTUP.O (vectors,  +first)      First, place the vector table of the STARTUP.O file vectors        * (+ro)                 Place additional Ro Property code in the back address space}       IRAM  0x40000000                      Define data Space     {   STARTUP.O (+RW, +zi)  } stacks   0x40004000  uninit          ; define stack space      {    STACK.O (+zi)    }     eram  0x81000000                      Define data space     {    * (+RW, +zi)      }              all data for the rest of the space not specified        HEAP + 0  uninit                      Define heap space      {     HEAP.O (+zi)    }

Scatter file Preparation

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