[Serialization] example of FPGA Series-8-3 priority encoder

Source: Internet
Author: User

8-3 encoder with priority in each node

Principle:

In a digital system, several parts may send service requests at the same time, but at the same time, only one of them can send a permitted operation signal. Therefore, you must set priorities for the operation permitted by these control objects, that is, the priority level.

The encoder has 8 inputs and 3 outputs. There is also an input enable EI, output enable EO and priority encoder working status mark GS. Encoder is effective at low cost. When EI = 0, the encoder works; the output is all high. The input priorities are 7, 6, 5 ,..., 0. When a low-level input has a lower-level input, and the input with a higher priority has no lower-level input, the output end outputs the code of the corresponding input.

II. Implementation

Enter the OpenGL code in the design file.

 1   `timescale 1 ns / 1 ps
2
3 module yxbm8_3 ( A ,I ,GS ,EO ,EI );
4
5 input [7:0] I ;
6 wire [7:0] I ;
7 input EI ;
8 wire EI ;
9
10 output [2:0] A ;
11 reg [2:0] A ;
12 output GS ;
13 reg GS ;
14 output EO ;
15 reg EO ;
16
17 always @ ( I or EI )
18 if ( EI )
19 begin
20 A <= 3'b111;
21 GS <= 1;
22 EO <= 1;
23 end
24 else if ( I[7] == 0 )
25 begin
26 A <= 3'b000;
27 GS <= 0;
28 EO <= 1;
29 end
30 else if ( I[6] == 0 )
31 begin
32 A <= 3'b001;
33 GS <= 0;
34 EO <= 1;
35 end
36 else if ( I[5] == 0 )
37 begin
38 A <= 3'b010;
39 GS <= 0;
40 EO <= 1;
41 end
42 else if ( I[4] == 0 )
43 begin
44 A <= 3'b011;
45 GS <= 0;
46 EO <= 1;
47 end
48 else if ( I[3] == 0 )
49 begin
50 A <= 3'b100;
51 GS <= 0;
52 EO <= 1;
53 end
54 else if ( I[2] == 0 )
55 begin
56 A <= 3'b101;
57 GS <= 0;
58 EO <= 1;
59 end
60 else if ( I[1] == 0 )
61 begin
62 A <= 3'b110;
63 GS <= 0;
64 EO <= 1;
65 end
66 else if ( I[0] == 0 )
67 begin
68 A <= 3'b111;
69 GS <= 0;
70 EO <= 1;
71 end
72 else if ( I == 8'b11111111)
73 begin
74 A <= 3'b111;
75 GS <= 1;
76 EO <= 0;
77 end
78 endmodule

 

 

 

 

 

 

 

 

 

 

 

 

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