[Serialization] FPGA-based instance-D Trigger

[Serialization] FPGA OpenGL series instances

D Trigger of OpenGL

I. Principles

A trigger is a logic circuit that can store one-bit binary code. It has two complementary outputs. Its output state is not only related to the input, but also to the original output state.
D-trigger is one of the triggers and the most widely used one. Its characteristic equation is

The logical functions are shown in Table 1.1,

 

II. Implementation

In the design file, enterCode

 1   'Timescale  1  NS  /    1  PS
  2   
  3   Module dflipflop (Q, CLK, reset, set, D, qN );
  4   
  5   Input CLK;
  6   Wire CLK;
  7   Input reset;
  8  Wire reset;
  9   Input set;
  10   Wire set;
  11   Input D;
  12   Wire D;
  13   
  14   Output Q;
  15   Reg Q;
  16   Output Qn;
 17   Wire Qn;
  18   
  19   Assign Qn  =     ~  Q;
  20   
  21   Always @ (posedge CLK or negedge set or negedge reset)
  22   Begin
  23    If  (  !  Reset)
  24   Q  <=     0  ;
  25     Else     If  (  ! Set)
  26   Q  <=     1  ;
  27     Else  Q  <=  D;
  28   
  29   End
 30   Endmodule