First, s3c2440 clock introduction
There are three kinds of clocks in s3c2440: FCLK,HCLK,PCLK.
FCLK for CPU cores, HCLK for Devices on AHB (Advanced high performance bus) buses, such as CPU cores, memory controllers, interrupt controllers, LCD controllers, DMA and USB host modules, etc. PCLK is used for devices on the APB (Advanced peripheral bus) buses such as Watchdog, IIS, I²c, PWM timers, MMC interfaces, ADCs, UART, GPIO, RTC, and SPI.
The s3c2440 has two plls to set the clocks, respectively: MPLL and UPLL. The MPLL is used to set up the above three clocks, while the UPLL is dedicated to USB devices.
Here's how MPLL works, look first.
(1) At power-up, the PLL does not start, FCLK equals the external input clock, called Fin (on the MINI2440 board I used, Fin=12mhz).
(2) After several milliseconds of power-up, the crystal oscillator (OSC) output is stable, and after the fclk=fin,nreset signal resumes high, the CPU begins to execute the command.
(3) Set the relevant registers of the MPLL in the program to set the FCLK value and the ratio of FCLK, HCLK and PCLK. After the program is executed here, MPLL starts. It will take a while (Lock time) for the MPLL output to stabilize.
(4) After Lock time, the MPLL output is normal and the CPU is working under the new FCLK.
second, the clock setting modeset the clock to set the following four registers. Among them:The locktime is used to set the lock length,Mpllcon is used to set the value of FCLK,CLKDIVN and CAMDIVN These two registers to set the values of HCLK and PCLK (they are divided by Flck).
1.LOCKTIME
This register is set to the length of the locktime mentioned above, generally set as the default is good.
2.MPLLCON
the above Pllcon actually represents the two registers of Mpllcon and Upllcon, and they are in the same format. This register is used to set the value of the FCLK, which is determined by this register and Fin, and is determined in the following formula:
The value of the fout above is the value of FCLK. The upper MDiv, Pdiv, Sdiv, and the bits in the upper register correspond. if we want to set FCLK to 200MHz, then according to the formula we need to set the Mpllcon register to: 0x0005c012.
3.CLKDIVN
The [3] bit in this register is used to set the uclk;[2:1] bit to set the ratio of HCLK to FCLK; [0] bits are used to set the proportions of PCLK and HCLK.
4.CAMDIVN
This register generally only needs to use [9]hclk4_half and [8]hclk3_half, which combine the two bits in the CLKDIVN register with the [2:1]HDIVN and [0]pdivn to set FCLK, Ratio of HCLK and PCLK. The settings and proportions of these four parameters are related to:
If we need to configure the crossover ratio of the three to 1:2:4, then set the CLKDIVN register to: 0X00000003;CAMDIVN is the default. at this point, we have completed the setup of the three clocks of the FCLK hclk pclk. Note: Vedon's "Complete Handbook of embedded Linux application development" says "if the HDIVN non-0,CPU bus mode should be changed from" Fast bus modes "to" Asynchronous bus ", this can be done by the following instructions ... "So we need to add the following code to the program. The instructions mentioned above:MRC P15, 0, R0, C1, C0, 0 Orr R0, R0, #R1_nF: Or:r1_ia @R1_nF: Or:r1_ia equals 0xC0000000. MRC P15, 0, R0, C1, C0, 0
third, the use of PWM timerThere are 5 16-bit timers in the s3c2440, where timers 0, 1, and 2/3 have a PWM function, i.e. they all have an output pin that can be used to control the high and low level changes of the pin periodically, and the timer 4 does not have an output pin. steps to use the timer:(1) to determine the operating frequency of a timer by setting TCFG0 and TCFG1 to PCLK. (2) The TCNTBN and TCMPBN registers are adopted to determine the initial and comparative values of the counts. (3) Set the Tcon register to set the operating mode of each timer. (4) Manually load the count initial and comparison values by setting the Tcon register. (5) Turn on the timer by setting the Tcon register. (6) The value of the current timer is obtained by reading the data in the Tcnto register. Workflow for Timers
the specific steps to use the timer are as follows:
1. Set the operating frequency of the timerthe clock source for the timer component is PCLK, which passes through a 8-bit prescaler (by configuring the TCFG0 register to determine the Prescaler multiplier), and then once again (by configuring the TCFG1 register to determine the crossover multiplier), this time the crossover multiplier can only be 2, One of 4, 8, 16. After two times, the operating frequency of the timer is obtained.
if Pclk=50mhz, we would like to set TIMER0 operating frequency of 31500Hz, then 50mhz/(99+1)/16=31500hz. According to the above values we need to set TCFG0 to 99,TCFG1 for 0x03.
2. Set Timer initial valueset the timer's two initial values, respectively, the initial count value, the comparison value. The initial count value is determined by the TCNTBN (n is 0-4, which represents 5 timers), and the comparison value is determined by TCMPBN. Use timer 0 as an example below. The count initial and comparison values need to be manually passed in registers inside the timer, and then when the counter is started, the internal count register is continuously reduced by one operation on the basis of the initial value. When the comparison value is reduced, the output level is reversed if we set the output reversal (set with the Tcon register). The count value continues to be reduced by one to 0 o'clock, and if the rollover is set, the level is flipped, and if the corresponding timer interrupt is enabled (the interrupt mask for the corresponding timer in the INTMSK register is canceled, and the total interrupt is turned on by setting the status register CSRP), an interrupt is generated. Then, based on the settings (set with the Tcon register), determine whether the initial and comparison values are automatically loaded. These actions are described in more detail later.
the above set operating frequency is 315MHz, because the counting initial value to reduce one operation, if want every 0.5s is a count period, then the count initial value should be set to 15625, namely tcntb0=15625. If we want to control the duty ratio of the PWM, we can set the comparison value to control, such as the duty ratio is 50%, the comparison value is the initial values of half, namely tcmpb0=7812.
3. Set how the timer works and manually pass in the initial value, then turn on the timer
Settings for how the timer works by using the Tcon register include: whether the output is reversed or not automatically re-installed. The manual incoming initial value and the on/off timer are also done via the Tcon register.
here only the [0-7] bits of the Timer0 are intercepted, and its [8-22] bits are about timer1-4. [0] turning the timer on or off 0 [1] Manually update the count initial and comparison values, namely: the value of TCNTB0 and TCMPB0 into the internal register of TIMER0. [2] The output is reversed [3] Whether the automatic reloading, when the internal register count value is zero, if the bit is able, then the count of the initial value and comparison values are automatically passed in the timer. [4] Dead zone enable, this I am useless, no research. the steps to start timer 0 are as follows: (1) with Tcon set whether reverse, whether automatic reloading (2) through the INTMSK register to open/Shield Timer0 interrupt request, through the status register CPSR Open/Mask Irq/fiq interrupt response. (3) enable the Tcon [1] bit, manual update. (4) enable the Tcon [0] bit, turn on the timer 0, here Note [1] bit should be 0 (turn off manual update).
4. Use the Tcnto register to get the count value in the current timer.
at this point, the PWM generator setup and start-up is complete. Some of the program code above is posted below. The complete program I have uploaded to the csdn download area (no need to download points), the link is as follows: Click to open the original program resource link
The program is based on my previous blog program for the basic writing, there is not clear where you can click on the following links to view: Click to open a blog link
Clock Setup program (head2. S file): Fclk=200mhz,hclk=100mhz,pclk=50mhz
<span style= "color: #996633;" >clock_init: ldr R1, =0x00000003 @FCLK: Hclk:pclk=1:2:4 ldr r0, =0x4c000014 @address of Register Named Clkdivn str R1, [R0] MRC P15, 0, R1, C1, C0, 0 Orr R1, R1, #0xc0000000 mcr p15, 0, R1, C1, C0, 0
ldr R1, =0x0005c012 @FCLK =200mhz ldr r0, =0x4c000004 @address of register named Mpllcon str R1, [R0] mov pc, lr</span>
initialization Program for timer 0 (init.c file):set TIMER0 and Timer1 two timer period is 0.5s,timer0 set a comparison value, and the board TIMER0 connected to the buzzer, when the TOUT0 (Timer0 PWM output port) output is high, the buzzer rang. Timer1 corresponding interrupt is turned on.
/* * Enable timer1 interrupt */void Init_irq () { Intmsk &= (~ (1<<11));}
<span style= "color: #996633;" >/* *init TIMER0 to auto Load initial numbers and every 0.5s to produce an interrupt */void timer_init (void) { Gpbco N |= gpb0_tout0; TCFG0 =; TCFG1 = 0x33; TCNTB0 = 15625; TCMPB0 = 13000; TCNTB1 = 15625; TCON |= ((1<<1) | (1<<9)); TCON = 0x090d;} </span>
TImer1 Interrupt Service Program (TIMER.C file):when the interrupt occurs, the Gpio port level of the connected LEDs is reversed, i.e. the LEDs on the mini2440 are illuminated every 0.5s.
<span style= "color: #996633;" >void timer1_handle (void) { if (intoffset ==11) { gpbdat = ~gpbdat; } SRCPND = 1<<intoffset; INTPND = INTPND;} </span>
Setting and application of clock setting and timer in s3c2440x system
