Seven working modes of ARM system [zz]

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I. The CPU of the arm system has the following seven working modes:

1. User Mode (usr ):NormalProgramExecution status

2. Fast interrupt mode (FIQ ):

3. interrupt mode (IRQ ):

4. Management Mode (SVC): The protection mode used by the operating system

5. System Mode (sys): Run privileged Operating System Tasks

6. Data Access termination mode (ABT): This mode is enabled when data or instruction prefetch is terminated.

7. undefined command termination mode (UND): This mode is used when undefined commands are executed.

Note:

You can useSoftware for mode switching, Or when various types of interruptions or exceptions occur, the CPUAutomatically enterCorresponding mode;

Except the user mode, all the other six work modes belongPrivileged mode;

In privileged mode, the other five modes are calledIs the exception mode;

Most programs run in user mode;

The privileged mode is used to handle interruptions, exceptions, or access protected system resources;

2. the cpu Of the arm system is in two working states:

1. Arm

2. Thumb

CPU power-on in arm State

3. Registers

Arm has 31 General 32-bit registers and 6 program status registers, which are divided into 7 groups. Some registers are shared by all working modes, some registers belong to each working mode;

R13 -- Stack pointer register, used to save the stack pointer;

R14-program connection register. When executing the BL subroutine call command, R14 gets the R15 backup, and R14 saves the R15 return value in case of interruption or exception;

R15 -- program counter;

Fast interrupt mode has 7 backup register R8-R14, which makes it possible to go into fast interrupt mode to execute a large part of the program without even having to save any register;

Other privileged modes contain two independent register copies: R13 and R14.In this way, each mode can haveStack pointerAndConnection register;

Iv. Current Program Status Register (CPSR)

CPSR has the following meanings:

T-bit: 1--cpu is in the thumb state, 0--cpu is in the arm State;

I, F (Interrupt prohibition bit): 1 -- disable interruption, 0 -- enable interruption;

Working Mode bits: You can change these bits to switch the mode;

5. program state storage register (spsr)

When switching to a privileged mode, spsr savesPrevious working modeIn this way, when the previous working mode is returned, the value of spsr can beRestoreCPSR;

Vi. mode switching

When an exception occurs and the CPU enters the corresponding exception modeAutomatic CPU completionOf:

1. Save the address of the next command to be executed in the previous Working Mode in R14 of the exception mode;

2. Copy the CPSR value to the spsr in exception mode;

3. Set the CPSR working mode to the working mode corresponding to the exception mode;

4. Make the Pc value equal to the address of this abnormal mode in the abnormal vector table, that is, jump to execute the corresponding instruction in the abnormal vector table;

When the abnormal working mode is returned to the previous working modeSoftware to completePerform the following tasks:

1. Subtract an appropriate value (4 or 8) from R14 in exception mode and assign it to the PC register;

2. Assign the spsr value of the exception mode to CPSR;