Several methods of output operation of Gpio bit in cortex-m3

1, port bit set/clear

In the STM32F1XX series chip, the corresponding position of the BSRR and BRR registers can be 1, in order to achieve the positioning and clearing 0 operations, such as:

GPIOA->BSRR = (1<<3); //　　set the bit 3 for Port A to 1　　　　　　　　　　GPIOA->BRR  = (1<<3); // clears the bit 3 of port A to 0

in the LPC17XX series chip, the corresponding position of the Fioset, FIOCLR register can be 1, in order to achieve the positioning and clearing 0 operation, such as:

Lpc_gpio2->fioset = (1<<3); //　　set the bit 3 for Port 2 to 1　　　　　　LPC_GPIO2->FIOCLR = (1<<3); // clears the bit 3 of Port 2 to 0

2. Direct Port output

In the STM32F1XX series chip, the ODR register can be located in the corresponding position 1 or 0 to achieve the set and clear 0 operations, such as:

Gpioa->odr |=  (1<<3); //　　bit 3 output of port a 1　　　　　　　　Gpioa->odr &= ~ (1<<3); // bit 3 output of port a 0

In the LPC17XX series chip, the corresponding position of the Fiopin register can be 1 or 0 to achieve the positioning and clearing 0 operations, such as:

Lpc_gpio2->fiopin |=  (1<<3); //　　bit 3 Output 1 for Port 2　　　　Lpc_gpio2->fiopin &= ~ (1<<3); // bit 3 Output 0 for Port 2

3, port bit with output

Refer to the fifth chapter of the cortex-m3 authoritative guide, the 5th section with the Operation (page 87 ~92).

To simplify the bit-band operation, you can define some macros. For example, we can create a macro that converts a "bit with address + bit number" to an alias address, and then creates a macro that translates the alias address into a pointer type.

// 1): Macro #definebitband (addr, Bitnum) ((Addr & 0xf0000000) +0x2000000+ ((), Convert "bit with address + bit serial number" to alias address     Addr & 0xFFFFF) <<5) + (BITNUM<<2) //#define     mem_addr (addr) * (Volat Ile unsigned long *) (addr) //3): Access #define     bit_addr (addr, bitnum) with bit alias address mem_addr (Bitband (addr, bitnum))　　　　　　

The application is as follows:

STM32F1XX Series Chip:

#define Paout (N) bit_addr ((uint32_t) &GPIOA->ODR, N)
　　　　
Paout (31; // bit 3 output of port a 1　　　　paout (30; // bit 3 output of port a 0

LPC17XX Series Chip:

#define　　　　P2out (N) bit_addr ((uint32_t) &lpc_gpio2->fiopin, N) p2out (31; // bit 3 Output 1 for Port 2　　　　p2out (30; // bit 3 Output 0 for Port 2

4. Port bit field output

Defines a port bit field that defines 16 bits (STM32F1XX) with a port of 16 bits and a 32-bit port to define 32 bits (LPC17XX).

#pragmaAnon_unions//so that the struct or the common body does not need another nametypedef union{UINT32_T WORDS; struct{intbit00:1; intBIT01:1; intBIT02:1; intbit03:1; intbit04:1; intbit05:1; intbit06:1; intbit07:1; intbit08:1; intbit09:1; intBit10:1; intBIT11:1; intBIT12:1; intBIT13:1; intBIT14:1; intBIT15:1; intBit16:1; intbit17:1; intbit18:1; intBIT19:1; intBIT20:1; intBit21:1; intBIT22:1; intbit23:1; intBit24:1; intBit25:1; intBit26:1; intBit27:1; intBIT28:1; intBit29:1; intBit30:1; intBIT31:1;　　}; }port;

The application is as follows:

STM32F1XX Series Chip:

#define　　　　PAout03 (((PORT *) (&GPIOA->ODR))->bit03) PAout031; // bit 3 output of port a 1　　　　0; // bit 3 output of port a 0

LPC17XX Series Chip:

#define p2out03 (((PORT *) (&lpc_gpio2->fiopin))->bit03)

p2out03　　　　1; // bit 3 Output 1 for Port 2
0; // bit 3 Output 0 for Port 2

　　

5. Overview

The above 4 methods, 1, 22 are more common; Method 3 is a bit band operation, the fastest, but only for the U with a bit band is effective; Method 4 is a novel universal method, as long as the input or output registers can be found, for any u effective!

　　

Several methods of output operation of Gpio bit in cortex-m3