Simulation of SPI protocol with gpio

Bus Technology2010-01-15 17:14:34 Read282 Comment0 Font Size:LargeMediumSmall Subscription

 

Classification: embedded multi-media

1. SPI protocol Overview

SPI, short for serial peripheral interface, is a serial peripheral interface. Motorola first defined it on its mc68hcxx series processor. The SPI interface is mainly used between EEPROM, Flash, real-time clock, AD converter, digital signal processor, and digital signal decoder. SPI is a high-speed, full-duplex, synchronous communication bus, and occupies only four lines on the chip pins, saving the chip pins, at the same time, it saves space for PCB layout and provides convenience. It is precisely because of this simple and easy-to-use feature that more and more chips are integrated with such communication protocols, such as at91rm9200.

The communication principle of SPI is very simple. It works in the master-slave mode. In this mode, there is usually a master device and one or more slave devices, and at least four lines are required, in fact, three can also be used (during Unidirectional transmission ). It is also common to all SPI-based devices, including SDI (data input), SDO (data output), sck (clock), and CS (chip selection ).

(1) SDO   -Data output from the master device

(2) SDI    -Master device data input, output from device data

(3) sclk  -Clock signal generated by the main device

(4) CS      -Enable signal from the device, controlled by the main device

Among them, CS is to control whether the chip is selected, that is, only when the chip selection signal is a pre-defined enable signal (high potential or low potential), this chip operation is effective. This allows connecting multiple SPI devices on the same bus.

Next we will be responsible for three lines of communication. Communication is completed through data exchange. First, we need to know that SPI is a serial communication protocol, that is, data is transmitted by one digit. This is why the sck clock line exists. sck provides the clock pulse, while SDI and SDO transmit data based on this pulse. The data output is transmitted through the SDO line. The data changes when the clock is on the rising or falling edge, and is read at the following falling or rising edge. The same principle applies to input when one data entry is complete. In this way, 8-bit data transmission can be completed after at least eight clock signal changes (the top and bottom ends are once.

Note that the sck signal line is only controlled by the main device, and the signal line cannot be controlled by the slave device. Likewise, a spi-based device must have at least one master device. This transmission feature: This transmission method has an advantage. Unlike ordinary serial communication, ordinary serial communication transmits at least 8 bits of data at a time, the SPI allows one-bit data transmission and even pause. Because the sck clock line is controlled by the master device, data is not collected or transmitted from the device when no clock jump occurs. That is to say, the master device can control the communication by controlling the sck clock line. SPI is also a Data Exchange Protocol: Because the SPI data input and output lines are independent, data input and output can be completed simultaneously. Different SPI devices are implemented in different ways, mainly because the data is changed and the collection time is different. The acquisition along or down the clock signal has different definitions. For details, see related device documentation.

In point-to-point communication, the SPI interface does not require addressing and is fully duplex communication, which is simple and efficient. In multiple slave device systems, each slave device requires independent enabling signals, and the hardware is slightly more complex than the I2C system.

Finally, one disadvantage of the SPI interface is that there is no specified flow control and no response mechanism is available to check whether data is received.

The SPI interface of at91rm9200 consists of four pins: spiclk, Mosi, Miso, And/SS. spiclk is the common clock of the entire SPI bus, and MoSi and miso are used as the host, indicates the input and output of the slave machine. MoSi indicates the output of the host, while miso indicates the input and output of the slave machine. /SS is the flag pin of the slave machine, in two SPI bus devices that communicate with each other,/the low level of the SS pin is the slave machine, on the contrary, the electrical flat height of the SS pin is the host. In an SPI communication system, a host is required. The SPI bus can be configured as single-master, single-master, and multi-slave, which are mutually master-slave.

The SPI chip selection can be expanded to select 16 peripherals. In this case, the PCs output = NPCs, that is, npcs0 ~ 3 to 4-16 decoder. This decoder requires an external 4-16 decoder. The input of the decoder is npcs0 ~ 3. The output is used to select 16 peripherals.

For details about the SPI specifications, refer to the SPI protocol.

 

Implementation of binary gpio analog SPI

  The following describes in detail how to use gpio to simulate the SPI protocol based on my project experience.

A LCD Driver ssd1815br1 is required in the project. Its communication with BB uses the SPI protocol. As the SPI bus on BB is used up, gpio is used for simulation.

The relationship between the SPI pins of gpio is as follows:

(1) SDO   -Gpio0 (Data cable from BB to LCD)

(2) SDI    -None, because BB does not need to receive data from the LCD temporarily

(3) sclk  -Gpio1

(4) CS      -Ground to keep the LCD in the enabling state.

 

The next step is to implement the SPI protocol. SPI has four transmission modes:

Developers can implement this based on the mode used by specific devices. The LCD mode of our project is cpol = 1, cpha = 1.

The specific implementation is as follows:

# Define spi_daTa  Gpio0

# Define spi_clk   Gpio1

Void spi_write (char daTa)

{

  Int8 I = 7;

  Uint8 mask [] = {0x01, 0x02, 0x04, 0x08, 0x10, 0x20, 0x40, 0x80 };

  

  For (; I> = 0; I --){

  Gpio_out (spi_clk, gpio_low_value );

  Gpio_out (spi_daTa, (DATA & Mask [I])> I ));

  

  Spi_delay (10 ); 

  

  Gpio_out (spi_clk, gpio_high_value );

   Spi_delay (10 );

}

}

In fact, it is very easy to simulate SPI, as long as it is compared with the SPI Transmission Mode Time Sequence diagram. It is important to note that there must be a waiting time so that the data can be stabilized on the data line and the device has time to retrieve the data. At the beginning of debugging, you can extend the waiting time by a bit. After the SPI is called, the waiting time is lowered.

  The write wait time is as follows:

  # Define spi_delay (Delay) \

  {\

      Register uint32 I = 0 ;\

      While (I <delay ){\

           _ ASM {\

                NOP ;\

                NOP ;\

                NOP ;\

                NOP ;\

             };\

             I-= 4 ;\

        }\

    }