Single-core, multi-core CPU atomic operations

Source: Internet
Author: User

1. What is "atomic operation ":
An atomic operation is an uninterrupted operation or a series of operations that are not interrupted by the thread scheduling mechanism. There is no context switch during the operation ).

2. Why do we focus on atomic operations?
1. If an operation is determined to be atomic, you do not need to add a lock that will consume expensive performance overhead to protect the operation.-(clever use of atomic operations and implementation of lock-free programming)
2. mutex can be implemented through atomic operations (mutex). (mutex_lock_t in Linux)
3. With mutex lock, more operations can be converted into atomic operations.

Iii. Single-core CPU atomic operations:
In a single-core CPU, all operations that can be completed in one command can be viewed as atomic operations, because interruptions only occur between commands.

4. Atomic operations on multi-core CPUs:
In the era of multi-core CPUs (indeed, Moore's Law is somewhat outdated. We need more CPUs, rather than faster CPUs, which cannot solve the issue of fast CPU heat distribution ), multiple independent CPUs are running in the system. operations that can be performed in a single command may be disturbed. A typical example is the Decl command, which is divided into three steps: "Read-> modify-> write", involving two memory operations. if multiple processes running on multiple CPUs execute this command at the same time, it is unpredictable.

5. Hardware Support & multi-core atomic operations:
Software-level atomic operations rely on hardware support. in the x86 system, the CPU provides the hlock pin lead, which allows the CPU to lower the potential of the hlock pin when executing a certain command (just one command, this command is not released until it is executed. thus, the bus is locked, so that the CPU on the same bus cannot access the memory temporarily through the bus, thus ensuring the atomicity of the multi-core processor. (think about the impact of this mechanism on performance ).

6. Which operations can be determined as atomic operations?
For non-long and double basic data types, "simple operations" can be considered as atomic. for example, assign values and return values. in most systems, long and double occupy 8 bytes. The operating system or JVM may separate the write and read Operations into two separate 32-bit operations for execution, this leads to a context switch in the Process of reading and writing, which leads to the possibility that different task threads can see incorrect results.

Increment, decrease is not an atomic operation: I ++ disassembly Assembly command: (requires three commands, and two memory access, one register modification)

Movl I, % eax // memory access, read the value of the I variable to the eax register addl $1 of the CPU, % eax // Add the value movl % eax in the register, I // write the value in the register to the memory


7. How to Implement the atomicity of ++ I and I ++:
1. multi-thread scheduling is prohibited when a single CPU is used. The concurrency of a single CPU is pseudo concurrency. (in a single-core CPU, it is unnecessary to use multithreading in programs without blocking ).
2. multi-core CPU, you need to use the lock provided by the CPU mentioned above to lock the bus to prevent other CPUs from accessing the memory during the entire process.

8. Two atomic operation interfaces provided by Linux:
1. Atomic Integer Operation
Atomic operations for integers can only process atomic_t data. The Int type of C language is not used here, mainly because:
1) Let the atomic function only accept the atomic_t type operand, can ensure that the atomic operation is only used with this special type of data.
2) use the atomic_t type to ensure that the compiler does not optimize access to the corresponding values. (The principle is that the variable is modified by volatile)
3) The atomic_t type can be used to shield Data Types in different architectures. Although the integer data on all machines supported by Linux is 32 bits, the code using atomic_t can only use this type of data as 24 bits. This restriction is entirely because the implementation of atomic operations is different from that of other systems in the structure of the iSCSI system: A 32-bit int-type low 8-bit locks are embedded, because the iSCSI architecture lacks command-level support for atomic operations, this lock can only be used to avoid concurrent access to atomic data.

The most common use of atomic integer operations is to implement counters. The atomic Integer Operation list is defined in. Atomic operations are usually restrained functions, which are often implemented through Embedded Assembly commands. If a function is atomic, it is often defined as a macro.

During kernel writing, the Operation demo is as follows:

atomic_t cnt;atomic_set(&cnt, 2);atomic_add(4, &cnt);atomic_inc(cnt);


2. Atomic bit operation:
The atomic bit operation is defined in the file. It is strange that bitwise operation functions operate on normal memory addresses. In most cases, the atomic bit operation accesses a long memory, so the bit number is between 0 and 31 (between 0 and 63 on 64-bit machines), but there is no limit on the range of the bit number.

Write the kernel code and give the pointer of the data to be operated to the operation function. Then, bitwise operations can be performed:

unsigned long var = 0;set_bit(0, &var);           /*set the 0th bit*/set_bit(1, &var);           /*set the 1th bit*/clear_bit(1, &var);         /*clear the 1th bit*/change_bit(0, &var);        /*change the 1th bit*/


9. spinlock CPU synchronization:
The spin lock must be locked Based on the CPU data bus. It reads a memory unit (spinlock_t) to determine whether the spin lock has been locked by another CPU. if no, it is written into a specific value, indicating that the bus is locked and then returned. if yes, it will repeat the above operation until the operation is successful, or the number of spin times exceeds a set value. remember the above: the command to lock the data bus can only ensure that the CPU exclusive data bus during one command operation. (When the spinlock is locked, it will not sleep but will continue to try ).


Single-core, multi-core CPU atomic operations

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